PRELIMINARY
CYW20710
6.6 LPO Clock Interface
The LPO clock is the second frequency reference that the CYW20710 uses to provide low-power mode timing for park, hold, and sniff.
The LPO clock can be provided to the device externally, from a 32.768 kHz source or the CYW20710 can operate using the internal
LPO clock.
The LPO can be internally driven from the main clock. However, sleep current will be impacted.
The accuracy of the internal LPO limits the maximum park, hold, and sniff intervals.
Table 7. External LPO Signal Requirements
Parameter
External LPO Clock
Units
Nominal input frequency
Frequency accuracy
Input signal amplitude
Signal type
32.768
±250
kHz
ppm
mVp-p
–
200 to 3600
Square-wave or sine-wave
Input impedance (when power is applied or power is off)
>100
<5
kΩ
pF
Document No. 002-14804 Rev. *H
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