9.14 I2C STOP Complete Interrupt - (AN2122/AN2126 only)
I2C Mode
I2CMODE
7FA7
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
STOPIE
0
R
0
R
0
R
0
R
0
R
0
R
0
R/W
0
R
0
Figure 9-11. I2C Mode Register
The I2C interrupt includes one additional interrupt source in the AN2122/AN2126, a 1-0
transition of the STOP bit. To enable this interrupt, set the STOPIE bit in the I2CMODE
register. The 8051 determines the interrupt source by checking the DONE and STOP bits
in the I2CS register.
I2C Control and Status
I2CS
7FA5
b7
b6
b5
b4
b3
b2
b1
b0
START
STOP
LASTRD
ID1
ID0
BERR
ACK
DONE
R/W
0
R/W
0
R/W
0
R
X
R
X
R
0
R
0
R
0
Figure 9-12. I2C Control and Status Register
I2C Data
I2DAT
7FA6
b7
b6
b5
b4
b3
b2
b1
b0
D7
D6
D5
D4
D3
D2
D1
D0
R/W
x
R/W
x
R/W
x
R/W
x
R/W
x
R/W
x
R/W
x
R/W
x
Figure 9-13. I2C Data
EZ-USB TRM v1.9
Chapter 9. EZ-USB Interrupts
Page 9-15
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