ACM100
0x09 Video Control 2
Bit Definition
15
0
14
0
13
0
12
11 10
9
0
8
0
7
0
6
0
5
0
4
3
0
2
0
1
0
0
0
0
0
0
0
PIX_RPLC
NLG_EN
NLG_Strength
Reserved
Data format
Reserved
CHKSUM
The Video control register is used to enable various features that affect the output video signal. The bits are defined as follows:
This field can be used to replace the active video with either all white or all black pixels. This is a feature
that can be used to test/troubleshoot the camera. The field is defined by the following table:
PIX_RPLC
PIX_RPLC
Normal Video
[15:14] PIX_RPLC:
00
01
10
11
Video is all black
Video is all white
Video is a counting value
Writing a ‘1’ to this field will enable a non-linear gain to be applied which will boos the signal strength
of darker regions of the image without saturating the bright images.
[13] NLG_EN:
[12] NLG_Strength:
[11:5] Reserved:
Writing a ‘1’to this field will enable the stronger setting of the non-linear gain function. Writing a ‘0’ will
enable the weaker setting.
These bits are reserved for future use and should not be set. To ensure compatibility with future
releases, we recommend using a read/modify/write operation to preserve the status of these bits.
When this bit is set to 0 it sets to Interlaced mode and when this bit is set to 1 it sets to Progressive
mode
[4] Data Format
[3:0] Reserved
These bits are reserved for future use and should not be set. To ensure compatibility with future
releases, we recommend using a read/modify/write operation to preserve the status of these bits.
Writing a 1 to this bit puts the I2C bus interface into a mode where the CHECKSUM byte is required
for all I2C register writes. The default for this bit is 0 which enables I2C writes to be terminated at the
end of the 2nd data byte which is compatible with older versions of the ACM100. For more details See
“Noise Immune Write” on page 4.
[0] CHKSUM
0x0A Autobrite Control
Bit Definition
15
0
14
0
13
0
12
0
11
1
10
1
9
1
8
1
7
1
6
0
5
1
4
0
3
0
2
1
1
1
0
1
Reserved
The Autobrite Control register is used to specify parameters that influence the automatic selection of a gamma code (dynamic
range control.) The bits are defined as follows:
[15] Reserved:
[14] Reserved:
This bit is reserved for future use and should not be set. To ensure compatibility with future
releases, we recommend using a read/modify/write operation to preserve the status of this bit.
This bit is reserved for future use and should not be set. To ensure compatibility with future
releases, we recommend using a read/modify/write operation to preserve the status of this bit.
Document Number: 001-05325 Rev. **
Page 15 of 20
CYPRESS [ CYPRESS ]
