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RS8953BEPJ 参数 Datasheet PDF下载

RS8953BEPJ图片预览
型号: RS8953BEPJ
PDF下载: 下载PDF文件 查看货源
内容描述: 高比特率数字用户线( HDSL )信道单元 [High-Bit-Rate Digital Subscriber Line (HDSL) channel unit]
分类和应用: 电信集成电路
文件页数/大小: 173 页 / 1229 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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RS8953B/8953SPB  
4.0 Registers  
HDSL Channel Unit  
4.4 HDSL Receive  
RX_ERR_EN  
Receive Error Interrupt Enable—Receive errors request RX_ERR interrupt and report  
RXn_ERR status upon detection of RFIFO errors [STATUS_1; addr 0x05], framer state  
transitions or error counter overflows [STATUS_2; addr 0x06]. Disabled channels are  
prevented from activating INTR*, or setting RX_ERR [IRR; addr 0x1F]. Receive errors are  
always latched in ERR_STATUS [addr 0x3C] regardless of RX_ERR_EN.  
0 = Disable RX_ERR interrupts  
1 = Enable RX_ERR interrupts  
0x62—Receive Elastic Store FIFO Reset (RFIFO_RST)  
Writing any data value to RFIFO_RST empties the RFIFO and forces the payload mapper to realign HDSL  
bytes with respect to the receive HDSL 6 ms frame. The MPU must write RFIFO_RST after modifying the  
Receive Payload Map [RMAP; addr 0x64] or the Combination Table [COMBINE_TBL; addr 0xEE] each time  
the receive framer changes from the SYNC_ACQUIRED to the IN_SYNC state [STATUS_2; addr 0x06];  
whenever a RFIFO error is reported [STATUS_1; addr 0x05]; and after the DPLL has settled. Writing  
RFIFO_RST corrupts up to three receive PCM frames worth of data.  
0x63—Receive Framer Synchronization Reset (SYNC_RST)  
Writing any data value to SYNC_RST forces the receive framer to the OUT_OF_SYNC state, which restarts the  
SYNC word search and causes the framer to issue an RX_ERR interrupt. The MPU must write SYNC_RST  
after modifying FRAMER_EN [RCMD_2; addr 0x61], SYNC_WORD_A, or SYNC_WORD_B. Writing  
SYNC_RST to the master HDSL channel corrupts up to three receive PCM frames worth of data and may cause  
a DPLL error interrupt.  
N8953BDSB  
Conexant  
4-21