RS8953B/8953SPB
4.0 Registers
HDSL Channel Unit
4.2 HDSL Transmit
4.2 HDSL Transmit
HDSL Channel 1
(CH1)
HDSL Channel 2
(CH2)
HDSL Channel 3
(CH3)
Base Address
0x00
0x20
0x40
Table 4-2. HDSL Transmit Write Registers
CH1
CH2
CH3
Register Label
Bits
Description
0x00
0x01
0x02
0x03
0x04
0x20
0x21
0x22
0x23
0x24
0xDF
0xE0
0xE1
0xE2
0xE3
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2F
0x30
0x31
0x32
0x2D
0x2E
0x40
0x41
0x42
0x43
0x44
TEOC_LO
TEOC_HI
TIND_LO
TIND_HI
TZBIT_1
TZBIT_2
TZBIT_3
TZBIT_4
TZBIT_5
TZBIT_6
TFIFO_WL
TCMD_1
TCMD_2
TMAP_1
TMAP_2
TMAP_3
TMAP_4
TMAP_5
TMAP_6
TMAP_7
TMAP_8
TMAP_9
TFIFO_RST
SCR_RST
8
5
Transmit EOC Bits
Transmit EOC Bits
Transmit IND Bits
Transmit IND Bits
Transmit Z-bits
8
5
8
8
Common Transmit Z-bits
Common Transmit Z-bits
Common Transmit Z-bits
Common Transmit Z-bits
Common Transmit Z-bits
Transmit FIFO Water Level
Configuration
8
8
8
8
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0F
0x10
0x11
0x12
0x0D
0x0E
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4F
0x50
0x51
0x52
0x4D
0x4E
8
7
6
Configuration
8
Payload Map
8
Payload Map
8
Payload Map
8
Payload Map
8
Payload Map
8
Payload Map
8
Payload Map
8
Payload Map
8
Payload Map
—
—
Transmit FIFO Reset
Scrambler Reset
N8953BDSB
Conexant
4-9