RS8953B/8953SPB
4.0 Registers
HDSL Channel Unit
4.17 PRA Receive Read
4.17 PRA Receive Read
Table 4-14. PRA Receive Read Registers
Address
Register Label
RX_PRA_CTRL0
Bits
Name/Description
PRA Receive Read Register 0
0x80
0x81
0x82
0x83
0x84
0x85
0x86
0x87
7
8
8
8
8
6
6
4
RX_PRA_CTRL1
RX_BITS_BUFF1
RX_PRA_E_CNT
RX_PRA_CRC_CNT
RX_PRA_CODE
RX_PRA_MON0
RX_PRA_MON2
PRA Receive Control Register 1
PRA Receive Bits Buffer 1
PRA Receive E Bit Counter
PRA Receive CRC4 Error Counter
PRA Receive In-Band Code
PRA Receive Monitor Register 0
PRA Receive Monitor Register 2
0x80—PRA Receive Control Register 0 (RX_PRA_CTRL0)
7
6
5
4
3
2
1
0
E_MODE[1:0]
SA8_MODE
SA7_MODE
—
SA6_MODE
SA5_MODE
SA4_MODE
SA4_MODE
SA5_MODE
SA6_MODE
SA7_MODE
SA8_MODE
Controls the behavior of Sa4 bits transmitted towards PCM, as follows:
0 = Transparent
1 = From bits buffer 1
Controls the behavior of Sa5 bits transmitted towards PCM, as follows:
0 = Transparent
1 = From bits buffer 1
Controls the behavior of Sa6 bits transmitted towards PCM, as follows:
0 = Transparent
1 = From bits buffer 0
Controls the behavior of Sa7 bits transmitted towards PCM, as follows:
0 = Transparent
1 = From bits buffer 1
Controls the behavior of Sa8 bits transmitted towards PCM, as follows:
0 = Transparent
1 = From bits buffer 1
N8953BDSB
Conexant
4-73
CONEXANT [ CONEXANT SYSTEMS, INC ]
