RS8953B/8953SPB
4.0 Registers
HDSL Channel Unit
4.16 PRA Transmit Write
AIS
Enables to override all 32 slots of an PCM frame except slot 0 transmitted towards the HDSL
link, with a constant pattern:
0 = Disable (Normal)
1 = 0xFF
NOTE:
AIS enables to achieve framed AIS. To achieve unframed arbitrary AUX pattern
generation, use the existing feature of the channel unit.
RST_E_CNT
Clears the TX_E counter
0 = Counter enabled
1 = Clear the E transmit counter
NOTE:
The value of this register takes effect starting with the next PCM multiframe
following the write access cycle completion.
0x72—PRA Transmit Bits Buffer 1 (TX_BITS_BUFF1)
7
6
5
4
3
2
1
0
Sa
Sa
Sa
—
SA6_MASK
SA5_MASK
A_MASK
—
8
7
4
The value of this register is only relevant if the corresponding MODE bit of TX_PRA_CTRL0 is set. A new
written value takes effect starting with the next PCM multiframe, following the register write access cycle
completion.
An in-band code is reported as detected when the pattern in the Sa6, Sa5, AND A fields remain constant for
8 consecutive multiframes.
Sa
Sa
Sa
The new value to be inserted into the Sa location of the data stream, in the PCM to HDSL
direction.
4
7
8
4
The new value to be inserted into the Sa location of the data stream, in the PCM to HDSL
7
direction.
The new value to be inserted into the Sa location of the data stream, in the PCM to HDSL
8
direction.
A_MASK
Determines whether the pattern in the A-bit field must remain constant for 8 consecutive
multiframes for an in-band code to be reported as detected.
SA5_MASK
SA6_MASK
Determines whether the pattern in the SA5 field must remain constant for 8 consecutive
multiframes for an in-band code to be reported as detected.
Determines whether the pattern in the SA6 field must remain constant for 8 consecutive
multiframes for an in-band code to be reported as detected.
0x73—PRA Transmit TMSYNC offset Register (TX_PRA_TMSYNC_OFFSET)
7
6
5
4
3
2
1
0
TX_PRA_TMSYNC_OFFSET[7:0]
The value of this register is used to enable the accommodation of the RS8953B to any TMSYNC signal shape.
When programmed to 0x00, the PRA circuitry assumes that the positive edge of the TMSYNC input signal
coincides with the first bit of an PCM framer.
N8953BDSB
Conexant
4-71
CONEXANT [ CONEXANT SYSTEMS, INC ]
