RS8953B/8953SPB
4.0 Registers
HDSL Channel Unit
4.15 PRA Transmit Read
4.15 PRA Transmit Read
Table 4-12. PRA Transmit Read Registers
Address
Register Label
Bits
Name/Description
0x40
0x41
0x42
0x43
0x45
0x46
0x47
TX_PRA_CTRL0
TX_PRA_CTRL1
TX_PRA_MON1
TX_PRA_E_CNT
TX_PRA_CODE
TX_PRA_MON0
TX_PRA_MON2
8
7
8
8
6
6
4
PRA Transmit Control Register 0
PRA Transmit Control Register 1
PRA Transmit Monitor Register 1
PRA Transmit E-Bits Register 0
PRA Transmit In-Band Code
PRA Transmit Monitor Register 0
PRA Transmit Monitor Register 2
0x40—PRA Transmit Control Register 0 (TX_PRA_CTRL0)
7
6
5
4
3
2
1
0
E_MODE[1:0]
SA8_MODE
SA7_MODE
SA6_MODE[1:0]
SA5_MODE
SA4_MODE
SA4_MODE
SA5_MODE
SA6_MODE
Controls the behavior of Sa4 bits transmitted towards the HDSL link, as follows:
0 = Transparent
1 = From bits buffer 1
Controls the behavior of Sa5 bits transmitted towards the HDSL link, as follows:
0 = Transparent
1 = From bits buffer 0
Controls the behavior of Sa6 bits transmitted towards the HDSL link, as follows:
Code
00
01
Sa6 Bits
Transparent
From bits buffer 0
Automatic
10
11
Illegal
The Automatic mode operates based on the result of the receiver (PCM to HDSL) CRC
check and E-bits, as follows:
Received E-bits
0 (Error)
Receive CRC Check
Error
Sa6
0011
0 (Error)
1 (No Error)
1 (No Error)
No Error
Error
No Error
0001
0010
From bits buffer 0 (sec0)
NOTE:
MSB of Sa6 is transmitted first (i.e., in frames 1 and 9).
N8953BDSB
Conexant
4-65
CONEXANT [ CONEXANT SYSTEMS, INC ]
