4.0 Registers
RS8953B/8953SPB
4.12 Interrupt and Reset
HDSL Channel Unit
0xEF—Reset BER Meter/Start BER Measurement (BER_RST)
Writing any data value to BER_RST clears the BER Meter error count [BER_METER; addr 0x1D]. The BER
Meter Status [BER_STATUS; addr 0x1E] instructs the BER meter to begin searching for pattern sync according
to the mode selected by PRBS_MODE [CMD_3; addr 0xE7] and BER_SEL [CMD_6; addr 0xF3]. It restarts
the BER meter test measurement interval defined by BER_SCALE [CMD_3; addr 0xE7]. The MPU must
configure PRBS_MODE, BER_SEL and BER_SCALE before issuing a BER_RST command.
After writing BER_RST, the MPU monitors SYNC_DONE to determine when the test pattern qualification
period has ended and then checks BER_SYNC [BER_STATUS; addr 0x1E] to verify that correct test pattern
has been received. The BER meter uses a 128-bit qualification period to examine receive data before updating
BER_SYNC, therefore the MPU may wait up to 2 ms before SYNC_DONE is activated. If BER_SYNC is not
found when the qualification period ends, then the test has failed to detect pattern sync and the MPU should
ignores the BER_METER results. The MPU may optionally repeat BER_RST in the event of a PRBS test
failure since the BER meter may have initialized LFSR with received bit errors. Similarly, the MPU should
repeat BER_RST if BER_METER reports any bit errors at the end of the qualification period during a PRBS
test.
Once BER_SYNC is detected, the MPU monitors BER_DONE to determine the end of the test measurement
interval. BER_METER results are updated in real time during the measurement interval and latched at the end
of the interval. The MPU can restart the test measurement interval and thereby extend the measurement
indefinitely by applying another BER_RST command before BER_DONE is activated.
0xF0—Reset PRBS Generator (PRBS_RST)
Writing any data value to PRBS_RST loads an 8-bit pattern from the FILL_PATT Register [addr 0xEA] into the
least significant byte of the PRBS generator’s 23-stage LFSR and clears all other LFSR bits. The MPU writes
PRBS_RST prior to the start of a PRBS or fixed pattern test.
NOTE:
Before issuing PRBS_RST to start a PRBS test, the MPU must initialize the
FILL_PATT value to something other than 0x00, or the LFSR output will be stuck at
all 0s.
0xF1—Reset Receiver (RX_RST)
For the RS8953B, writing any data value to RX_RST forces the PCM formatter to align the PCM receive
timebase with respect to the master HDSL channel’s receive 6 ms frame by reloading the RFIFO_WL value
[addr 0xCD]. The MPU must write RX_RST after modifying the RFIFO_WL value in the RS8953B. The
RS8953B automatically performs RX_RST each time the master HDSL channel’s receive framer changes
alignment and transitions to the IN_SYNC state.
Issuing RX_RST while the PCM formatter is aligned causes no change in alignment of the PCM receive
timebase.
4-52
Conexant
N8953BDSB
CONEXANT [ CONEXANT SYSTEMS, INC ]
