4.0 Registers
RS8953B/8953SPB
4.11 Common Command
HDSL Channel Unit
NCO_SCALE
NCO Scale Factor—Divides the NCO clock by 4 to allow the NCO to synthesize the RCLK
frequency at or below 128 kHz. GCLK and SCLK are not affected.
0 = Normal NCO operation
1 = Divide NCO clock (HFCLK) by 4
NOTE:
Calculated values for DPLL_RESID [addr 0xD5] and DPLL_FACTOR [addr 0xD7]
are changed according to the following equation:
f
× PLL_MUL
--M-----C---L---K------------------------------------
[INTEGER.FRACTION] =
4 × 2 × fPCM
FEBE_POLARITY
PRA_EN
Determines the value of the FEBE bit that increments the FEBE counter.
0 = FEBE counter increments when FEBE bit is high
1 = FEBE counter increments when FEBE bit is low
Enable or globally disable the PRA circuitry.
0 = Disable ALL PRA functionality
1 = Enable ALL PRA functionality
4-50
Conexant
N8953BDSB