CX82100 Home Network Processor Data Sheet
3
HNP Memory Architecture
3.1
HNP Memory Map
The HNP system memory map is shown in Figure 3-1. All internal and external memory
and APB peripheral registers are memory-mapped directly to the first 16 MB region of
the ASB 32-bit address space. Note that the map shows only the memory range reserved
for each ASB slave. The actual memory size required by each slave varies depending on
its design. Each memory area is allocated with a fixed starting address (i.e., it is not
relocatable).
From the figure, it can be seen that there are two different memory maps, Run-time and
Boot-time. The reason for the different maps is to allow the Operating System (OS) to
change the ARM exception vectors located at address 0x0 at run-time. Once boot is
complete and memory maps are switched (external Flash ROM and internal RAM
address space is swapped), the OS may change these exception vectors since they are
now located in RAM.
101306C
Conexant Proprietary and Confidential Information
3-1
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