CX82100 Home Network Processor Data Sheet
9.3.11
GPIO Interrupt Status Register 1 for GPIO[15:14; 8:5] (GPIO_ISR1: 0x003500D8)
GPIO_ISR1 is the interrupt input status register for GPIO[15:14; 8:5].
Note: If an interrupt is level-sensitive, the corresponding status bit will remain a 1 as
long as the interrupt source is not removed. The status bit can be cleared only
after the interrupt source is removed and a 1 is written to the bit.
Bit(s)
15:0;
15≥Y≥0,
Y = Bit #
Type
RR
Default
Name
Description
GPIO[X] Interrupt Status, 15≥X≥0.
See specific GPIO_IS{X},
bit
15≥X≥0,
X = Y.
Reading:
bit #Y = 0 = > No interrupt detected on GPIO[X].
bit #Y = 1 = > Interrupt input detected on GPIO[X].
Writing:
0 to bit #Y = > no effect
1 to bit #Y = > clear the interrupt on GPIO[X].
Note: If the interrupt is level-sensitive, the status bit will remain a 1 as
long as the interrupt resource is not removed. The bit can be cleared
only after the resource is removed and a 1 is written to it.
Bit(s)
15
14
13:9
8
7
6
Type
RR
RR
Default
1’b0
1’b0
Name
GPIO_IS15
GPIO_IS14
Description
GPIO15 Interrupt Status.
GPIO14 Interrupt Status.
Reserved.
GPIO8 Interrupt Status.
GPIO7 Interrupt Status.
GPIO6 Interrupt Status.
GPIO5 Interrupt Status.
Reserved.
RR
RR
RR
RR
1’b0
1’b0
1’b0
1’b0
GPIO_IS8
GPIO_IS7
GPIO_IS6
GPIO_IS5
5
4:0
9.3.12
GPIO Interrupt Status Register 2 for GPIO[31; 27:24; 22:16] (GPIO_ISR2:
0x003500DC)
GPIO_ISR2 is the interrupt input status register for GPIO[31; 27:16].
Note: If an interrupt is level-sensitive, the corresponding status bit will remain a 1 as
long as the interrupt source is not removed. The status bit can be cleared only
after the interrupt source is removed and a 1 is written to the bit.
Bit(s)
Type
Default
Name
Description
9-10
Conexant Proprietary and Confidential Information
101306C
CONEXANT [ CONEXANT SYSTEMS, INC ]
