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CX28395-19 参数 Datasheet PDF下载

CX28395-19图片预览
型号: CX28395-19
PDF下载: 下载PDF文件 查看货源
内容描述: 四核/ X16 /八路T1 / E1 / J1成帧器 [Quad/x16/Octal?T1/E1/J1 Framers]
分类和应用: 电信集成电路
文件页数/大小: 305 页 / 1863 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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CX28394/28395/28398  
3.0 Registers  
Quad/x16/OctalT1/E1/J1 Framers  
3.16 System Bus Registers  
0DDRAM Parity Status (PERR)  
All system bus data, signaling, and controls are transferred through a set of internal RAMs that have parity error  
detection capabilities. Any parity error that is detected during a RAM access is reported in PERR. Each error  
event is latched active high and held until the processor read clears PERR. Parity errors are indicative of system  
clock glitches (REFCKI, TSBCKI, or RSBCKI), a failing or excessively noisy power supply, or general circuit  
failure.  
7
6
5
4
3
2
1
0
PERR_TPC  
PERR_RPC  
PERR_SBC  
PERR_TPC  
PERR_RPC  
PERR_SBC  
TPC (Transmit) RAM Parity Error  
RPC (Receive) RAM Parity Error  
SBC (Control) RAM Parity Error  
0E0–0FF—System Bus Per-Channel Control (SBCn; n = 0 to 31)  
7
6
5
4
3
2
1
0
INSERT  
SIG_LP  
RLOOP  
RINDO  
TINDO  
TSIG_AB  
ASSIGN  
INSERT  
Insert RX Signaling on RPCMO—Enables per-channel signaling insertion on RPCMO output,  
where ABCD signaling is supplied by RLOCAL signaling (RPCn; addr 180–19F) or buffered  
signaling [RSIGn; addr 1A0–IBF]. INSERT is a lower priority than no signaling (SIG_OFF;  
addr 0D1). RSB signaling frame locations are specified by RMSYNC signal in conjunction  
with programmed frame offset [OFFSET; addr 0D8].  
SIG_OFF  
INSERT RLOCAL  
RPCMO Inserted Signal  
1
0
0
X
1
X
0
None  
ABCD from RSIGn output buffer  
ABCD from RPCn local buffer  
1
1
SIG_LP  
RLOOP  
RINDO  
Local Signaling Loopback—RSIGO output signaling supplied from TSIGn buffer contents.  
0 = normal  
1 = local signaling loopback  
Local Loopback—RPCMO output data supplied from TSLIP buffer contents.  
0 = normal  
1 = local loopback  
Activate RINDO Time Slot Indicator—Receive system bus time slots are individually marked  
(active high for 8 bits) by RINDO. Note that SBI_OE (addr 0D0) overrides RINDO.  
0 = RINDO signal inactive (low)  
1 = RINDO signal active (high)  
TINDO  
Activate TINDO Time Slot Indicator—Transmit system bus time slots are individually marked  
(active high for 8 bits) by TINDO.  
0 = TINDO inactive  
1 = TINDO active  
100054E  
Conexant  
3-109  
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