CX28394/28395/28398
2.0 Circuit Description
Quad/x16/Octal—T1/E1/J1 Framers
2.7 Serial Interface
2.7 Serial Interface
The device provides a serial interface that allows the microprocessor to indirectly
communicate with an attached LIU (such as the Conexant CX28380 Quad T1/E1
LIU). This interface allows the microprocessor to control and query the LIU
status. One 8-bit register in the LIU can be written via the SERDO pin or read
from the SERDI pin at the clock rate determined by the SERCKO clock output.
The serial interface supports a glueless interface to two quad LIUs by supplying
two independently controlled external chip select lines on the CX28398:
SERCS1* and SERCS2*. The CX28394 provides a single SERCS* chip select
line. On the CX28395, the serial interface is not accessable.
The serial interface uses a 16-bit process for each write or read operation.
During a write operation, a 16-bit word—consisting of [SER_CTRL; addr 022]
and [SER_DAT; addr 023]—is transmitted to the LIU. The SER_CTL register
contains the LIU register address for the current operation and a read/write
control bit. During a read operation, SER_CTL is transmitted and 8-bit data from
the LIU is received and placed in SER_DAT register. Writing to SER_CTL
initiates a serial interface read or write operation.
The Data register contains either write or read data. For the write operation, its
content is written to the SERDO serial port on the eight SERCKO cycles
immediately following the Address/Command byte. Likewise, for the read
operation, data on the SERDI serial port is input immediately on the eight
SERCKO clock cycles following the Address/Command byte.
Figure 2-29 illustrates serial interface timing.
Figure 2-29. Serial Interface Timing Diagram
Read Timing
SERCS*
SERCLK
SERDO
SERDI
R/W A0 A1 A2 A3 A4 A5 A6
D0 D1 D2 D3 D4 D5 D6 D7
Write Timing
R/W A0 A1 A2 A3 A4 A5 A6 D0 D1 D2 D3 D4 D5 D6 D7
Conexant
SERCS*
SERCLK
SERDO
SERDI
100054E
2-61