CX25870/871
Appendix E HDTV Output Mode
Flicker-Free Video Encoder with Ultrascale Technology
E.2 Allowable Interfaces for HDTV Output Mode
The allowable interfaces for HDTV Output Mode are illustrated in
Figures E-1 and E-2.
Figure E-1. CX25870/871’s Pseudo-Master interface with a Graphics Controller as the Timing Master
Clock
Clock
R or P
G or Y
R
Delay
CX25870/
CX25871
Digital RGB
or YPrPb
Graphics
Controller
B or P
B
HSYNC*
VSYNC*
BLANK* (Optional)
100381_030a
Figure E-2. CX25870/871’s Slave interface with a Graphics Controller as the Timing Master
Clock
R or P
G or Y
R
CX25870/
CX25871
Digital RGB
Graphics
Controller
or YPrPb
B or P
B
HSYNC*
VSYNC*
BLANK* Optional)
100381_031
100381B
Conexant
E-3