2.0 Internal Registers
CX25870/871
Flicker-Free Video Encoder with Ultrascale Technology
Table 2-1. Register Bit Map (* Indicates Read-Only Register) (2 of 4)
8-Bit
Address
D7
D6
D5
D4
D3
D2
D1
D0
4A
4C
4E
50
52
54
56
58
5A
5C
5E
60
62
64
66
68
6A
6C
DR_LIMITP[7:0]
DR_LIMITN[7:0]
Reserved
Reserved
DR_LIMITN[10:8]
DB_LIMITN[10:8]
DR_LIMITP[10:8]
DB_LIMITP[10:8]
DB_LIMITP[7:0]
DB_LIMITN[7:0]
Reserved
Reserved
FIL4286INCR[7:0]
Reserved
Reserved
FILFSCONV[5:0]
Y_OFF[7:0]
HUE_ADJ[7:0]
XDSSEL[3:0]
CCSEL[3:0]
EWSSF2
EWSSF1
Reserved
Reserved
Reserved
WSDAT[4:1]
WSDAT[12:5]
WSDAT[20:13]
WSSINC[7:0]
WSSINC[15:8]
Reserved
Reserved
Reserved
BLNK_IGNORE EN_SCART
WSSINC[19:16]
TIMING_
RST
EN_REG_RD FFCBAR
EACTIVE
FLD_MODE[1:0]
6E
70
72
74
HSYNOFFSET[7:0]
HSYNOFFSET[9:8]
Reserved
HSYNWIDTH[5:0]
DATDLY
DATSWP
Reserved
H_CLKO[7:0]
VSYNWIDTH[2:0]
76(1)
78(1)
7A(1)
7C(1)
7E(1)
80(1)
82(1)
84(1)
86(1)
H_ACTIVE[7:0]
HSYNC_WIDTH[7:0]
HBURST_BEGIN[7:0]
HBURST_END[7:0]
H_BLANKO[7:0]
V_BLANKO[7:0]
V_ACTIVEO[7:0]
V_ACTIVEO[
8]
H_ACTIVE[10:8]
H_CLKO[11:8]
2-2
Conexant
100381B