CX25870/871
1.0 Functional Description
Flicker-Free Video Encoder with Ultrascale Technology
1.3 Device Description
Table 1-31 summarizes the meaning of the read-back bits when the agency procedure
is used and ESTATUS[1:0] = 10, 01, or 00.
Table 1-31. ESTATUS[1:0] Read-back Bit Map
ESTATUS
[1:0]
7
6
5
4
3
2
1
0
00
01
10
ID[2:0]
VERSION[4:0]
MONSTAT_A MONSTAT_B MONSTAT_C
CCSTAT_E
CCSTAT_O
FIFO_OVER
FIELD[2:0]
PAL
Reserved
SECAM
PLL_RESET_O PLL_LOCK
UT
FIFO_
UNDER
RESERVED
NOTE(S): Descriptions of these bits are found in Table 2-4.
5. If ESTATUS = 01, the serial master should receive one byte of information
telling it the following information in this order:
a. Monitor Connection Status for DACA output (MONSTAT_A = most
significant bit).
b. Monitor Connection Status for DACB output (MONSTAT_B).
c. Monitor Connection Status for DACC output (MONSTAT_C).
d. CCSTAT_E, CCSTAT_O.
e. FIELD2, FIELD1, FIELD0 (least significant bit). The FIELD[2:0] bits
indicate the field number that was last encoded. 000 indicates the 1st
field.
6. The serial master must issue a STOP condition to finish the Read
transaction. An ACK is not necessary before closing the transaction
because the CX25870 just ignores the ACK anyway. In reality, the
CX25870/871 does not really care about ending a transaction properly as
long as a proper START condition is used to start the next transaction. In
the read mode when the CX25870 is driving the SDA port, ending the
transaction cannot take place until the encoder releases control of the SID
line. This happens during the transition from when the last bit of the
register is output to the receiving of the ACK.
7. The graphics controller, acting as the serial master, should clear the
CHECK_STAT register bit back to 0 (bit D6 of register BA) by writing
zero to the CHECK_STAT register bit (bit D6 of register BA) to display
standard video again from the CX25870/871 VGA encoder.
To reiterate, a START condition needs to be issued by the serial master to start
the next transaction. In the read mode, when the CX25870/871 is driving the SID
port, an end to the transaction cannot take place until the encoder releases control
of the SID line. This event happens during the transition from when the last bit of
the register is output to the receiving of the ACK.
100381B
Conexant
1-89
CONEXANT [ CONEXANT SYSTEMS, INC ]
