1.0 Functional Description
CX25870/871
1.3 Device Description
Flicker-Free Video Encoder with Ultrascale Technology
Of course, the master device’s timing signals (HSYNC*, VSYNC*, CLKI)
and the digital data sent to the CX25870/871 must also be adjusted to ensure the
proper operation of this mode.
Some applications, such as VESA compliant PC Monitors, dictate that the
embedded bilevel syncs be completely absent from the RGB analog outputs.
Fortunately, the CX25870/871 can provide VESA’s ‘syncless’ outputs so long as
the additional set of bits found in Table 1-30 are programmed as shown:
Complete all steps in Tables 1-29 plus 1-30.
Table 1-30. Serial Writes Required to Remove Bilevel Syncs from all VGA/DAC Outputs
Bit Name
HDTV_EN
Location
Value
Comment
Bit 7—Register 0x28
Bits[1:0]—Register 0x28
Bit 6—Register 0x28
Bit 3—Register 0x28
Bit 4—Register 0x28
Bit 5—Register 0x28
DACs output HDTV compatible RGB
Default state. No need to reprogram.
Default state. No need to reprogram.
Disables sync on Blue output
1
00
0
RASTER_SEL[1:0]
RGB2PRPB
BPB_SYNC_DIS
GY_SYNC_DIS
RPR_SYNC_DIS
1
Disables sync on Green output
Disables sync on Red output
1
1
NOTE(S): When all bits in Tables 1-29 and 1-30 are programmed correctly, the active video level range will be from +286 mV to
+986 mV.
The outputs generated from the combined steps listed in Table 1-29 and
Table 1-30 will not contain any embedded syncs, but will contain a positive
286 mV DC offset because the encoder cannot generate negative voltage levels.
Therefore, the blanking level will reside at 286 mV and the maximum luminance
level is 986 mV for the 3 different outputs. The HSYNC* and VSYNC* digital
inputs received by the CX25870/871 will continue to cause blanking, but this is
irrelevant since the data itself is blanked at these times.
To reiterate, the VESA Video Signal Standard specification requires that the
DAC analog output stay between 0.0 Vdc and 0.700 Vdc +.07 V (or -.03 V) with
no excursions at all times. Clearly, the blank and maximum luminance levels for
the CX25870/871 are in violation of this specification. To compensate for the DC
offset, the CX25870/871 is reliant on the VGA Monitor’s decode capabilities to
remove this DC deviation. Through testing, Conexant has determined that most, if
not all, present-day monitors have this function to filter out minor DC offsets.
Other major characteristics of the CX25870/871 VGA—DAC Output Mode are:
•
•
Acceptable digital RGB inputs include 24/16/or 15 bits per pixel
multiplexed or nonmultiplexed RGB
Acceptable digital YCrCb inputs include 24/16 bits per pixel multiplexed
or nonmultiplexed YCrCb
•
•
CX25870 can only be a slave to the data master in this type of operation
Sampling rate in this mode is determined based on the incoming clock
frequency (CLKI)
•
DAC resolution for all DACs = 10-bits
1-86
Conexant
100381B
CONEXANT [ CONEXANT SYSTEMS, INC ]
