Bt860/861
5.0 Serial Programming Interface and Registers
5.4 Register Detail
Multiport YCrCb to NTSC/PAL /SECAM
Register 08
Default
Value
Register
08
D7
D6
D5
D4
D3
D2
D1
D0
7E
AHSYNC_WIDTH[7:0]
AHSYNC_WIDTH[7:0]
Analog Horizontal Sync Width
Measured in system clock cycles, from 50% points of sync pulse.
Register 09
Default
Value
Register
D7
D6
D5
D4
D3
D2
D1
D0
09
90
HBURST_BEG[7:0]
HBURST_BEG[7:0]
Beginning of Burst
50% point of burst from the 50% point of the analog horizontal sync falling edge,
measured in system clock cycles.
Register 0A
Default
Register
D7
D6
D5
D4
D3
D2
D1
D0
Value
0A
54
HBURST_END[7:0]
HBURST_END[7:0]
End of Burst
50% point of burst from the 50% point of the analog horizontal sync falling edge,
measured in system clock cycles – 128.
D860DSA
Conexant
5-15
CONEXANT [ CONEXANT SYSTEMS, INC ]
