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BT8375EPF 参数 Datasheet PDF下载

BT8375EPF图片预览
型号: BT8375EPF
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片收发器T1 / E1和综合业务数字网( ISDN )基本速率接口 [single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces]
分类和应用: 电信集成电路综合业务数字网
文件页数/大小: 323 页 / 1950 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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2.0 Circuit Description  
2.8 Transmitter  
Bt8370/8375/8376  
Fully Integrated T1/E1 Framer and Line Interface  
2.8.4 Overhead Pattern Generator  
The transmit overhead generation circuitry provides the ability to insert all of the  
overhead associated with the Primary Rate Channel. The following types of  
overhead pattern generation are supported: Framing patterns, Alarm patterns,  
Cyclic Redundancy Check (CRC), and Far-End Block Error (FEBE).  
2.8.4.1 Framing Pattern  
Generation  
The framing pattern generation circuitry inserts the following patterns into the  
data stream: the 2-bit terminal framing (Ft) pattern, the 6-bit signaling frame (Fs)  
pattern, the 6-bit FPS pattern, the 8-bit FAS/NFAS pattern, and the 6-bit MFAS  
pattern.  
The Ft pattern in SF, SLC-96, and T1DM is inserted into the transmit data  
stream by enabling the INS_FBIT in the Transmit Frame Format register [TFRM;  
addr 072]. The Fs pattern in SF is inserted by enabling the INS_MF bit. The FPS  
pattern in ESF and the FAS/NFAS pattern in E1 mode are inserted by enabling the  
INS_FBIT bit. The MFAS pattern is inserted by enabling the INS_MF bit.  
2.8.4.2 Alarm Generator  
The Transmit Alarm Generation circuitry generates Alarm Indication Signal  
(AIS) and Remote Alarm Indication (RAI/Yellow Alarm).  
AIS Generation  
AIS is defined as an unframed all-1s pattern and is normally transmitted when the  
data source is lost. AIS transmission can be enabled as follows:  
Manually  
Automatically upon detection of transmit loss of clock  
Automatically upon loss of received signal or loss of receive clock  
Typical applications require transmission of AIS toward the line when DTE  
transmit data or clock is not present. In most applications, DTE data and clock are  
isolated from the transmitter, requiring manual AIS transmission under software  
control. Manual insertion of AIS is controlled by the TAIS bit in the Transmit  
Alarm Signal Configuration register [TALM; addr 075]. Setting this bit  
overwrites the currently transmitted data with the AIS pattern. If AISCLK  
[TLIU_CR; addr 068] is also set, AIS is transmitted using AIS Clock Input  
(ACKI); otherwise it uses the clock present at TCKI MUX output [CMUX; addr  
01A].  
Automatic transmission of AIS can be controlled by detection of transmit loss  
of clock [TLOC; addr 048]. This mode is enabled by setting AISCLK and  
providing an alternate transmit line rate clock on the ACKI clock input pin.  
By setting AUTO_AIS in the TALM register, automatic transmission of AIS  
can also be controlled by detection of Receiver Loss of Signal [RLOS; addr 047]  
or Receiver Loss of Clock [RLOC; addr 047], depending on whether an analog or  
digital line interface option [RDIGI; addr 020] is used. This mode is typically  
used to transmit AIS (keep-alive) during line loopback if the received signal is  
lost. Setting AUTO_AIS simultaneously with setting LLOOP [LOOP; addr 014]  
enables this operation.  
2-60  
Conexant  
N8370DSE  
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