Bt8370/8375/8376
2.0 Circuit Description
2.8 Transmitter
Fully Integrated T1/E1 Framer and Line Interface
The Transmit Data Link Controller can be programmed according to the CPU
bandwidth of your system. For systems with 1 CPU dedicated to 1 Bt8370, the
data link status can be polled, and the 64-byte transmit FIFO can be used like a
single byte transmit buffer. For systems where a single CPU controls multiple
Bt8370s, the data link can be interrupt-driven and the entire 64-byte transmit
FIFO can be used to store entire messages. See Figures 2-30 and 2-31 for a
high-level description of polling and interrupt-driven Transmit Data Link
Controller software.
Figure 2-30. Polled Transmit Data Link Processing
Message
Block 1
Transmit Message
0x00
0x20
0x40
Write Block/Byte to FIFO
Block 2
Block 3
If
Yes
End of
Message
No
Wait N Milliseconds
Read FIFO Status
Write End of Message Register
Return
If
No
FIFO Empty
or Near
Empty
Yes
NOTE(S): Selected N based on the data rate of link.
N8370DSE
Conexant
2-57
CONEXANT [ CONEXANT SYSTEMS, INC ]
