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BT8375EPF 参数 Datasheet PDF下载

BT8375EPF图片预览
型号: BT8375EPF
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片收发器T1 / E1和综合业务数字网( ISDN )基本速率接口 [single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces]
分类和应用: 电信集成电路综合业务数字网
文件页数/大小: 323 页 / 1950 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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Bt8370/8375/8376  
Fully Integrated T1/E1 Framer and Line Interface  
3.17 System Bus Registers  
0DBRSLIP Phase Status (RPHASE)  
7
6
5
4
3
2
1
0
RDELAY[5]  
RDELAY[4]  
RDELAY[3]  
RDELAY[2]  
RDELAY[1]  
RDELAY[0]  
RSLIP_WR  
RSLIP_RD  
RDELAY[5:0]  
RSLIP Buffer DelayThe difference between the RX and RSB timebase in time slot intervals,  
reported once per frame, coincident with RFRAME interrupt [ISR3; addr 008]. Actual delay  
may vary significantly, depending on which time slots are assigned.  
000000 = RX to RSB delay in the range of 07 bits  
|
111111 = RX to RSB delay in the range of 504511 bits  
RSLIP_RD  
RSLIP_WR  
Active Receiver Slip Buffer HalfIndicates which half of the receive slip buffer is currently  
receiving data from the receiver (0 = RSLIP_LO, 1 = RSLIP_HI). The processor can read data  
from the opposite buffer half.  
Active RSB Slip Buffer HalfIndicates which half of the receive slip buffer is currently  
supplying data to the Receive System Bus (0 = RSLIP_LO, 1 = RSLIP_HI). The processor can  
write data to the opposite buffer half.  
0DCTSLIP Phase Status (TPHASE)  
7
6
5
4
3
2
1
0
TDELAY[5]  
TDELAY[4]  
TDELAY[3]  
TDELAY[2]  
TDELAY[1]  
TDELAY[0]  
TSLIP_WR  
TSLIP_RD  
TDELAY[5:0]  
TSLIP Buffer DelayThe difference between the TSB and TX timebase in time slot intervals,  
reported once per frame, coincident with the TFRAME interrupt [ISR3; addr 008]. The actual  
delay may vary significantly, depending on which time slots are assigned.  
000000 = TSB to TX delay in the range of 07 bits  
|
111111 = TSB to TX delay in the range of 496503 bits  
TSLIP_WR  
TSLIP_RD  
Active Transmitter Slip Buffer HalfIndicates which half of the transmit slip buffer is  
currently supplying data to the transmitter (0 = TSLIP_LO, 1 = TSLIP_HI). The processor can  
write data to the opposite buffer half.  
Active TSB Slip Buffer HalfIndicates which half of the transmit slip buffer is currently  
receiving data from the Transmit System Bus (0 = TSLIP_LO, 1 = TSLIP_HI). The processor  
can read data from the opposite buffer half.  
N8370DSE  
Conexant  
3-127  
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