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BT8375EPF 参数 Datasheet PDF下载

BT8375EPF图片预览
型号: BT8375EPF
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片收发器T1 / E1和综合业务数字网( ISDN )基本速率接口 [single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces]
分类和应用: 电信集成电路综合业务数字网
文件页数/大小: 323 页 / 1950 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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Bt8370/8375/8376  
Fully Integrated T1/E1 Framer and Line Interface  
3.17 System Bus Registers  
TSIG_AB  
TSIG_ABAB Signaling. In T1 mode, only AB signaling bits are updated from TSIGI to the  
TSIGn buffer. If SIGFRZ is active, the output CD signaling bits are copied from the buffered  
output AB bits, respectively. In E1 mode, setting TSIG_AB forces C = 0 and D = 1 when  
updating the TSIGn buffer.  
0 = ABCD Signaling  
1 = AB Signaling  
ASSIGN  
Assign System Bus Time SlotDuring T1 line applications where the system bus group  
consists of 32 time slots, or a multiple of 32, any 24 out of 32 time slots can be assigned. The  
only time SBC [1:24] must be assigned is during 1536K or 1544K bus modes. The number of  
assigned system bus time slots must equal the number of line time slots; therefore, ASSIGN  
must be active in all 32 SBCn locations during E1 modes. The receiver does not update  
unassigned time slots as it fills the RSLIP buffer. T1 time slots are filled sequentially from  
RSLIP 1 to 24. Time slots 0 and 25 to 31 are reserved for unassigned values. Values are read  
from either assigned or unassigned locations in a sequential fashion based on the ASSIGN bit.  
System bus output data for unassigned time slots is taken from the RSLIP buffer, which the  
processor can fill with any desired 16-bit fixed value (8 bits in RSLIP_LO, plus 8 bits in  
RSLIP_HI).  
0 = unassigned system bus time slot  
1 = assigned system bus time slot  
10011FTransmit Per-Channel Control (TPCn; n = 0 to 31)  
7
6
5
4
3
2
1
0
TB7ZS/EMFBIT  
TLOOP  
TIDLE  
TLOCAL  
TSIGA/TSIGO  
TSIGB/RSIGO  
TSIGC  
TSIGD  
TB7ZS/EMFBIT  
Bit 7 Zero Code Substitution/Embedded F-bit Value (Applicable in T1 mode only)For  
assigned system bus time slots [ASSIGN; addr 0E0-0FF], TB7ZS replaces bit 7 of the time  
slot with a one if examination of 8-bit output detects all zeros. For an unassigned time slot  
where TIDLE is active, EMFBIT replaces all embedded F-bit outputs with the programmed  
EMFBIT value.  
0 = no effect or force embedded F-bit (low)  
1 = enable B7ZS or force embedded F-bit (high)  
N8370DSE  
Conexant  
3-129  
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