Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
3.17 System Bus Registers
TSIGO
Transmit Signaling Output—Applicable only if TLOCAL is inactive. ABCD signaling from
TSIGn buffer is transmitted.
0 = no effect
1 = transmit signaling from TSIGn buffer
RSIGO
Receive Signaling Output—Applicable only if TLOCAL is inactive. Forces transmit ABCD
signaling to be supplied from RSIGn buffer, affecting a remote signaling loopback.
0 = no effect
1 = transmit signaling from RSIGn buffer
120–13F—Transmit Signaling Buffer (TSIGn; n = 0 to 31)
Transmit signaling from the TSIGI pin is automatically placed into the TSIGn buffer. The processor controls
TSIGn insertion into the transmitter output by selecting TSIGO [in TPCn]. The processor can monitor TSIGn
from system supplied signaling or use TSIGn for inter-processor communication. During E1 modes, TSIG0 and
TSIG16 buffer locations hold the CAS multiframe alignment signal (MAS.1 through MAS.4), extra bits (X.1
through X.4), and multiframe Yellow Alarm (MYEL) bits supplied from TSIGI.
7
6
5
4
3
2
1
0
—
—
—
—
TSIGn[3]
TSIGn[2]
TSIGn[1]
TSIGn[0]
TSIG0 (E1)
MAS.1
TSIG16 (E1 mode)
TSIGn.3
TSIGn.2
TSIGn.1
TSIGn.0
Input Signaling A Bit
Input Signaling B Bit
Input Signaling C Bit
Input Signaling D Bit
X.1
MYEL
X.3
MAS.2
MAS.3
MAS.4
X.4
N8370DSE
Conexant
3-131
CONEXANT [ CONEXANT SYSTEMS, INC ]
