3
3.0 Registers
3.1 Registers Overview
Table 3-1 displays an overview of the CN8223 registers. All registers are 16-bit, and the addresses are on 16-bit
boundaries. There are seven address pins, A[7:1]. A[0] is always 0; therefore, it does not require a pin.
Table 3-1. ATM Transmitter/Receiver Status Registers, Counters, and Data Link Control
CN8223 Control and Status Registers
Address
Name
Allowed Operations
0x00–0x31, 0x60
0x38–0x3B
0x3C
Control Registers
Status Registers
Read and Write
Read Only
Part Number/Version/FEAC Rx
Line Framer/PHY Error Counters
Cell Error Counters
Read Only
0x40–0x48
0x49–0x4D
0x4E–0x57
0x58–0x5B
0x5C–0x5F
Read Only
Read Only
Cell Transmitted/Received Counters
Receive HDLC Data Link Buffers
Transmit HDLC Data Link Buffers
Read Only
Read Only
Read and Write
100046C
Conexant
3-1