1.0 Product Description
CN8223
1.10 Pin Definitions
ATM Transmitter/Receiver with UTOPIA Interface
Table 1-2. Hardware Signal Definitions (5 of 5)
Pin Label
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
Signal Name
No.
Type
I/O
Definition
Address Bus
85
86
87
88
89
90
91
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
I
I
I
I
I
I
I
Seven-bit address input for addressing registers
within the chip. Addresses are loaded when AS~
is low.
8KCKI
8 kHz Reference
Clock Input
62
61
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
I
I
I
I
Used to synchronize PLCP, and drive ONESECO.
ONESECI
RCV_HLD
NTEST
One-Second Clock
Sync
1 Hz input used to latch line status every one
second.
Receiver Hold
Input
123
If asserted, this pin stops the cell receiver.
Test Input
59
Connect to Vcc for normal operation.
Connect to ground for normal operation.
TEST1
TEST3
Test Inputs
117
119
CMOS/TTL
CMOS/TTL
I
I
RESET
Reset
118
CMOS/TTL
I
Active-high pulse on power-up for at least
100 ns. This pin resets the internal state
machines. It does not affect the contents of the
registers, except bit 9 of register 0x02.
ONESECO
VCC
One-Second
Output
60
CMOS/TTL
O
One-second count derived from count of 8 kHz
input.
Supply Voltage
14
27
40
54
67
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
—
—
—
—
—
—
—
—
—
—
—
Eleven pins are provided for supply voltage.
80
107
120
134
147
160
GND
Ground
1
13
26
41
53
66
81
93
106
121
133
146
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
—
—
—
—
—
—
—
—
—
—
—
—
Twelve pins are provided for ground.
1-24
Conexant
100046C
CONEXANT [ CONEXANT SYSTEMS, INC ]
