1.0 Product Description
CN8223
1.10 Pin Definitions
ATM Transmitter/Receiver with UTOPIA Interface
Table 1-2. Hardware Signal Definitions (3 of 5)
Pin Label
Signal Name
No.
Type
I/O
Definition
FDAT_IN[0]
FDAT_IN[1]
FDAT_IN[2]
FDAT_IN[3]
FDAT_IN[4]
FDAT_IN[5]
FDAT_IN[6]
FDAT_IN[7]
FDAT_IN[8]
FIFO Data Bus
98
99
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
I
I
I
I
I
I
I
I
I
FIFO interface input data bus for transmit. See
Section 2.7.1.
100
101
102
103
104
105
108
FCTRL_IN[0]
FCTRL_IN[1]
FCTRL_IN[2]
FCTRL_IN[3]
FCTRL_IN[4]
FCTRL_IN[5]
FCTRL_IN[6]
FCTRL_IN[7]
FIFO Control Input
109
110
111
112
113
114
115
116
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
I
I
I
I
I
I
I
I
FIFO interface empty/full flag inputs. See
Section 2.7.1.
FDAT_OUT[0]
FDAT_OUT[1]
FDAT_OUT[2]
FDAT_OUT[3]
FDAT_OUT[4]
FDAT_OUT[5]
FDAT_OUT[6]
FDAT_OUT[7]
FDAT_OUT[8]
FIFO Data Bus Out
143
144
145
148
149
150
151
152
153
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
O
O
O
O
O
O
O
O
O
FIFO interface output data bus for receive. See
Section 2.7.1.
FCTRL_OUT[0]
FCTRL_OUT[1]
FCTRL_OUT[2]
FCTRL_OUT[3]
FCTRL_OUT[4]
FCTRL_OUT[5]
FCTRL_OUT[6]
FCTRL_OUT[7]
FCTRL_OUT[8]
FCTRL_OUT[9]
FCTRL_OUT[10]
FCTRL_OUT[11]
FCTRL_OUT[12]
FCTRL_OUT[13]
FCTRL_OUT[14]
FCTRL_OUT[15]
FCTRL_OUT[16]
FIFO Control
Outputs
124
125
126
127
128
129
130
131
132
135
136
137
138
139
140
141
142
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
FIFO interface strobe and control outputs. See
Section 2.7.1.
1-22
Conexant
100046C
CONEXANT [ CONEXANT SYSTEMS, INC ]
