CN8223
1.0 Product Description
ATM Transmitter/Receiver with UTOPIA Interface
1.10 Pin Definitions
Table 1-2. Hardware Signal Definitions (2 of 5)
Pin Label
TXOVH[0]
TXOVH[1]
TXOVH[2]
TXOVH[3]
TXOVH[4]
TXOVH[5]
TXOVH[6]
TXOVH[7]
Signal Name
No.
Type
I/O
Definition
Transmit bus input for
STS-1/STS-3c/STM-1/G.832 overhead. Tie to a
logic low level if not used.
Transmit Overhead
Bus
44
45
46
47
48
49
50
51
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
I
I
I
I
I
I
I
I
RXOVH[0]
RXOVH[1]
RXOVH[2]
RXOVH[3]
RXOVH[4]
RXOVH[5]
RXOVH[6]
RXOVH[7]
Receive Overhead
Bus
156
157
158
159
2
3
4
5
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
CMOS/TTL
O
O
O
O
O
O
O
O
Receive bus output for
STS-1/STS-3c/STM-1/G.832 overhead.
RMRKR[1]
RMRKR[0]
Receive Overhead
Markers
8
9
CMOS/TTL
CMOS/TTL
O
O
Used for overhead bus output. RMRKR[1] is an
8 kHz output synchronized to the received PLCP
frame. RMRKR[1] is not available in DS-3 direct
cell mapping mode.
ROVH_CLK[1]
ROVH_CLK[0]
Receive Overhead
Clocks
6
7
CMOS/TTL
CMOS/TTL
O
O
Used for overhead bus output.
TOVH_CLK
Transmit Overhead
Clock
55
CMOS/TTL
O
Used for bus input.
TMRKR
Transmit Overhead
Marker
52
CMOS/TTL
O
Used for bus input in modes 4, 5, 6 and 7 (OC3,
OC1, E4 and G.832 E3).
100046C
Conexant
1-21