欢迎访问ic37.com |
会员登录 免费注册
发布采购

28222-13 参数 Datasheet PDF下载

28222-13图片预览
型号: 28222-13
PDF下载: 下载PDF文件 查看货源
内容描述: ATM发射器/接收器与UTOPIA接口 [ATM Transmitter/Receiver with UTOPIA Interface]
分类和应用: 异步传输模式ATM
文件页数/大小: 161 页 / 1722 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
 浏览型号28222-13的Datasheet PDF文件第26页浏览型号28222-13的Datasheet PDF文件第27页浏览型号28222-13的Datasheet PDF文件第28页浏览型号28222-13的Datasheet PDF文件第29页浏览型号28222-13的Datasheet PDF文件第31页浏览型号28222-13的Datasheet PDF文件第32页浏览型号28222-13的Datasheet PDF文件第33页浏览型号28222-13的Datasheet PDF文件第34页  
1.0 Product Description  
CN8223  
1.10 Pin Definitions  
ATM Transmitter/Receiver with UTOPIA Interface  
Table 1-2. Hardware Signal Definitions (1 of 5)  
Pin Label  
RXCKI  
Signal Name  
No.  
Type  
I/O  
Definition  
Receive Clock  
Input  
10  
CMOS/TTL  
I
Receive clock for all line rates except STS-3c,  
STM-1, and E4.  
RXCKI_HS–  
RXCKI_HS+  
Receive Clock  
Input  
11  
12  
PECL  
PECL  
I
I
Differential PECL level for high-speed modes.  
Receive clock for STS-3c, STM-1, and E4. Tie to  
+5 V if not used.  
RXIN_HS–  
RXIN_HS+  
Receive Serial  
Input  
20  
21  
PECL  
PECL  
I
I
Differential PECL level for high-speed modes.  
Serial data in for STS-3c, STM-1, and E4. Tie to  
+5 V if not used.  
RXIN[0]  
RXIN[1]  
RXIN[2]  
RXIN[3]  
RXIN[4]  
RXIN[5]  
RXIN[6]  
RXIN[7]  
RXIN[8]  
Receive Input  
15  
16  
17  
18  
19  
22  
25  
154  
155  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
I
I
I
I
I
I
I
I
I
Receive parallel and TAXI mode data inputs. Tie  
to a logic low level if not used.  
TXCKI  
Transmit Clock  
Input  
30  
CMOS/TTL  
I
Transmit clock for all modes except STS-3c,  
STM-1, and E4.  
TXCKI_HS–  
TXCKI_HS+  
Transmit Clock  
Input  
23  
24  
PECL  
PECL  
I
I
Differential PECL level for high-speed modes.  
Transmit clock for STS-3c, STM-1, and E4. Tie to  
+5 V if not used.  
TXIN  
Transmit Inputs  
32  
31  
CMOS/TTL  
CMOS/TTL  
I
Transmit serial data input for all modes except  
STS-3c, STM-1, and E4.  
TCLKO  
Transmit Clock  
Output  
O
Transmit clock output for all modes except  
STS-3c, STM-1, and E4.  
TXOUT[0]  
TXOUT[1]  
TXOUT[2]  
TXOUT[3]  
TXOUT[4]  
TXOUT[5]  
TXOUT[6]  
TXOUT[7]  
TXOUT[8]  
Transmit Output  
33  
34  
35  
36  
42  
43  
56  
57  
58  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
CMOS/TTL  
O
O
O
O
O
O
O
O
O
Transmit parallel and TAXI mode data outputs.  
TCLKO_HS+  
TCLKO_HS–  
Transmit Clock Out  
Transmit Serial Out  
28  
29  
PECL  
PECL  
O
O
Differential PECL level. Transmit clock output for  
STS-3c, STM-1, and E4.  
TXOUT_HS+  
TXOUT_HS–  
38  
39  
PECL  
PECL  
O
O
Differential PECL level. Transmit serial data  
output for STS-3c, STM-1, and E4.  
LOCD  
Loss of Cell  
Delineation  
122  
CMOS/TTL  
O
Asserted when cell synchronization is lost.  
1-20  
Conexant  
100046C