VSR CODEC with DRAM CONTROL
4
MX812 PRELIMINARY INFORMATION
Application Information
VDD
D
WE
C 5
CAS
VDD
CAS
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DGND
RAS
DGND
WE
D
XTAL
RAS
A10/R2
A9
3
D
A10/R2
4
R
IRQ
A9
5
A
M
SERIAL CLOCK
A8
A7
A6
A5
A4
A8
6
COMMAND DATA
CS
A7
A6
A5
A4
7
MX812J
8
REPLY DATA
VBIAS
9
10
11
12
13
14
C1
AUDIO OUT
EBIAS
A3
A2
A1
A0
A3
A2
A1
AUDIO IN
C3
A0
VSS
C4
C 2
Component
Value
C1
Dependent upon the input
impedance of the driven stage
1.0µF
0.1µF
1.0µF non-electrolytic
C2
C3
C4
Tolerance: Capacitors = -50/+100%
Figure 2 - Recommended External Components
+ 5.0V
VCC
VDD
XTAL
XTAL
XTAL/CLOCK
STORE
AUDIO IN
Cellular
Audio
PLAY
AUDIO OUT
MX812
Processor
eg. MX8n6
E BIAS
VBIAS
VBIAS
VSS
VSS
Figure 3 - Interfacing to an Audio Processor
© 1997 MX•COM Inc.
www.mxcom.com Tele: 800 638-5577 910 744-5050 Fax: 910 744-5054
Doc. # 20480076.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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CMLMICRO [ CML MICROCIRCUITS ]
