GMSK Packet Data Modem and RF Transceiver
CMX990
5.2.5 Write Only Registers
Data Buffer
$00
Write
7
6
5
4
4
3
3
2
2
1
1
0
0
Bit:
Tx Data
Command Register
$01
Write
7
6
5
Bit:
Enable
packet
detect
Acquire
Bit Clock
Acquire
I Q Offset
Acquire
AFC
Task Control
Control Register
$02
Write
7
6
5
4
3
2
1
1
0
0
Bit:
Frequency Tracking
Control
AGC Control
IQ Offset Control
PLL Control
Mode Register
$03
Write
7
6
5
4
3
2
Bit:
IRQ
Enable
En PLL
Lock IRQ
Enable DQ
IRQ
Enable
Main ADC
Enable
Main DAC
INVBit
TxRxN
SCREn
Power Up 1
$04
Write
7
6
5
4
3
2
1
0
Bit:
Enable
Clock
Enable
Baseband
V Reg
OP1 OP2
Rx IF
Rx RF1
Rx RF2
Tx RFIF
Power Up 2
$05
Write
7
6
5
4
3
2
1
0
Bit:
AUX
DAC3
AUX
DAC2
AUX
DAC1
AUX
DAC0
LNA ON
(External)
Preserve
Registers
RESET
Vbias
Aux DAC 0
$08-09 Write
Bit:
7
6
6
6
6
5
5
5
5
4
3
2
2
2
2
1
1
1
1
0
0
0
0
7
0
6
0
5
0
4
0
3
0
2
0
1
1
1
1
0
0
0
0
MSB
LSB
LSB
LSB
LSB
Aux DAC 1
Bit:
$0A-0B Write
7
4
3
7
0
6
0
5
0
4
0
3
0
2
0
MSB
Aux DAC 2
Bit:
$0C-0DWrite
7
4
3
7
0
6
0
5
0
4
0
3
0
2
0
MSB
Aux DAC 3
Bit:
$0E-0F Write
7
4
3
7
0
6
0
5
0
4
0
3
0
2
0
MSB
ã 2004 CML Microsystems Plc
48
D/990/1
CMLMICRO [ CML MICROCIRCUITS ]
