GMSK Packet Data Modem
CMX909B
TSO - Transmit Scrambler Output
This task, intended for channel set-up, enables the scrambler and transmits its output.
When the modem has started the task the Status Register bits will not be changed and hence an
IRQ will not be raised. The µC may write the next task and its data to the modem at any time and
the scrambler output will stop when the new task has produced its first data.
TSD - Transmit Short Data Block
This task takes 4 bytes of data from the Data Buffer, calculates and applies a 16-bit CRC and forms
the FEC for the 4 data bytes and the CRC. This data is then interleaved and passed through the
scrambler, if enabled, before being transmitted as a Mobitex Data Block.
Once the modem has read the data bytes from the Data Buffer, the BFREE and IRQ bits of the
Status Register will be set to ‘1’, indicating to the µC that it may write the next task and its data to the
modem.
Note: In transmit mode the CRC checksum circuit is initialised on completion of any task other than
NULL.
RESET - Stop any current action
This task takes effect immediately, and terminates any current action (task, AQBC or AQLEV) the
modem may be performing and sets the BFREE bit of the Status Register to ‘1’, without setting the
IRQ bit. It should be used when V is applied to set the modem into a known state.
DD
Note that due to delays in the internal switched capacitor filter, it will take approximately 3 bit times
for any change to become apparent at the TXOP pin.
PSBias - PowerSave Bias Circuit
If the TASK bits are in this setting when B3 of the Mode register is set to ‘1’ the device will power
down the Bias chain in addition to powering down those circuits described in 1.5.4.4. The voltage
on VBIAS will decay to 0V as will the level on the TXOP, DOC1 and DOC2 pins.
PSBiXt - PowerSave Bias and Xtal Circuit
If the TASK bits are in this setting when B3 of the Mode register is set to ‘1’ the device will power
down the Bias chain and stop the Xtal oscillator in addition to powering down those circuits
described in 1.5.4.4. The voltage on VBIAS will decay to 0V as will the level on the TXOP, DOC1 and
DOC2 pins. The voltage on the XTALN pin will go to a logic ‘1’ regardless of the level at the XTAL
pin.
Task Timings
The device should not write to the Command Register whenever PSBiXt and PSAVE bits are set
and for at least 2 bit times after the following:
Changing from powersave state to normal operation.
Changing the Tx/Rx bit.
Resetting or after power is applied to the device.
This is to ensure that the internal operation of the device is initialised correctly for the new task.
Note that this only applies to the Command Register, the other registers may be accessed as
normal.
ã 2001 Consumer Microcircuits Limited
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D/909B/1
CMLMICRO [ CML MICROCIRCUITS ]
