GMSK Packet Data Modem
CMX909B
RDB - Read Data Block
This task causes the modem to read the next 240 bits as a Mobitex Data Block.
It will de-scramble and de-interleave the bits, FEC correct and CRC check the resulting 18 data
bytes and place them into the Data Buffer, setting the BFREE and IRQ bits of the Status Register to
‘1’ when the task is complete to indicate that the µC may read the data from the Data Buffer and
write the next task to the modem’s Command Register. The CRCFEC bit will be set according to
the outcome of the CRC check.
Note: in receive mode the CRC checksum circuits are initialised on completion of any task other
than NULL.
SFS - Search for Frame Sync
This task, which is intended for special test and channel monitoring purposes, performs the first part
only of a SFH task. It causes the modem to search the received signal for a 16-bit sequence which
matches the Frame Synchronisation pattern with up to any 1 bit in error.
When a match is found the modem will set the BFREE and IRQ bits of the Status Register to ‘1’ and
update the MOBAN bit. The µC may then write the next task to the Command Register.
RSB - Read Single Byte
This task causes the modem to read the next 8 bits and translate them directly (without de-
interleaving or FEC) to an 8-bit byte which is placed into the Data Buffer (B7 will represent the
earliest bit received). The BFREE and IRQ bits of the Status Register will then be set to ‘1’ to
indicate that the µC may read the data byte from the Data Buffer and write the next task to the
Command Register.
This task is intended for special tests and channel monitoring - perhaps preceded by an SFS task.
LFSB - Load Frame Sync Bytes
This task takes 2 bytes from the Data Buffer and updates the Frame Sync detect bytes. The MSB of
byte ‘0’ is compared to the first bit of a received Frame Sync pattern and the LSB of byte ‘1’ is
compared to the last bit of a received Frame Sync pattern. This task does not enable Frame Sync
detection.
Unlike other Rx tasks, the data buffer must be loaded before the task is issued and the task must
only be issued ‘between’ received messages, i.e. before the first task for receiving a message and
after the last data is read out of the data buffer.
Once the modem has read the Frame Sync bytes from the Data Buffer, the BFREE and IRQ bits of
the Status Register will be set to ‘1’, indicating to the µC that it may write the next task to the
modem.
SFHZ - Search for Frame Head with Zero Errors
This performs the same task as SFH task but allowing no bits to be in error over the 16-bit Frame
Sync pattern.
ã 2001 Consumer Microcircuits Limited
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D/909B/1
CMLMICRO [ CML MICROCIRCUITS ]
