GMSK Packet Data Modem
CMX909B
Figure 8 The Receive Process
NULL - No effect
This task is provided so that a AQBC or AQLEV command can be initiated without loading a new
task.
SFH - Search for Frame Head
Causes the modem to search the received signal for a Frame Head. The Frame Head will consist
of a 16-bit Frame Sync followed by control data (see Figure 6 - Mobitex Over Air Signal). The
search will continue until a Frame Head has been found, or until the RESET task is loaded.
The search is carried out by first attempting to match the incoming bits against the previously
programmed (task LFSB) 16-bit Frame Sync pattern (allowing up to any one bit (of 16) in error).
When a match has been found, the modem will read the next 3 received bytes as Frame Head
bytes, these bytes will be checked, and corrected if necessary, using the FEC bits. The two Frame
Head Data bytes are then placed into the Data Buffer.
The BFREE and IRQ bits of the Status Register will then be set to a logic ‘1’ to indicate that the µC
may read the 2 Frame Head Data bytes from the Data Buffer and write the next task to the
Command Register. If the FEC indicates uncorrectable errors the modem will set the CRCFEC bit
in the Status Register to a logic ‘1’. The MOBAN bit (Mobile or Base) in the Status Register will be
set according to the polarity of the 3 bits preceding the Frame Sync pattern.
R3H - Read 3-byte Frame Head
This task, which would normally follow an SFS task, will place the next 3 bytes directly into the Data
Buffer. It also causes the modem to check the 3 bytes as Frame Head control data bytes and will
set the CRCFEC bit to a logic ‘1’ (high) only if the FEC bits indicate uncorrectable errors. Note: This
task will not correct any errors and, due to the Mobitex FEC specification, will not detect all possible
uncorrectable error patterns The BFREE and IRQ bits of the Status Register will be set to ‘1’ when
the task is complete to indicate that the µC may read the data from the Data Buffer and write the
next task to the modem's Command Register.
The CRCFEC bit in the Status Register will be set according to the validity of the received FEC bits.
ã 2001 Consumer Microcircuits Limited
19
D/909B/1
CMLMICRO [ CML MICROCIRCUITS ]
