Marine VHF Audio and Signalling Processor
CMX885
2
Block Diagram
Core Operations and Routing
MIC
MOD1
MOD2
AUDIO
Voice
Filter
Channel
Filter
Soft
Limiter
Pre-Emphasis
Scrambler
(Sections can be de-selected and processing order is
programmable)
VBIAS
Tx Audio Processing
DISC
ALT
Voice
Filter
De-Scrambler
De-Emphasis
(Sections can be de-selected and processing order is
programmable)
VBIAS
Rx Audio Processing
FSK Demodulator
FSK Modulator
DSC
DSC
ATIS
ATIS
NOAA SAME
DTMF Decoder
NWR Detection
Filter
VBIAS
DTMF Encoder
Audio Tones
Rx Processing
Tx Processing
In-Band Signalling and Data
Auxiliary Systems
Control Systems
TXENA
RXENA
Configured IO
IRQN
RDATA
CSN
Digital IO
Registers
C-BUS Interface
SYSCLK1
SYSCLK2
System Clocks
CDATA
SCLK
Synthesised Clocks
Ramp Profile RAM
DAC 1
DAC 2
DAC 3
DAC 4
XTALN
Crystal
Oscillator
DAC
Outputs
Main PLL and Dividers
XTAL/CLK
DACs
DVDD
VDEC
DVSS
Regulator
Bias
Level Thresholds
Averaging
ADC 1
ADC 2
Power Control
ADC
Inputs
MUX
AVDD
VBIAS
AVSS
Level Thresholds
Averaging
ADCs
Figure 1 Block Diagram
© 2010 CML Microsystems Plc
6
D/885/3