Marine VHF Audio and Signalling Processor
CMX885
0
8.1.14 AuxADC Threshold Data – $B5 write
15
ADC High
Sel /Low
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
Aux ADC Threshold Data
b15 AuxADC select
b14 high/low select
b13 reserved
b12 reserved
b11 reserved
0 = AuxADC1
0 = low threshold
0
0
0
0
1 = reserved
1 = high threshold
b10 reserved
b9-0 Threshold Data
8.1.15 Reserved – $B6 write
8.1.16 NWR Status and Data – $BB read
15
14
13
12
11
x
10
x
9
x
8
x
7
6
5
4
3
2
1
0
NWR Status
NWR SAME Data
b15 NWR WAT tone status
0 = no tone
0 = no data
0 = no data
0 = no data
1 = WAT tone detected
b14 NWR SAME data terminator
b13 NWR SAME data header
b12 NWR SAME data status
b11 reserved
1 = data terminator NNNN detected
1 = data header ZCZC detected
1 = data available
b10 reserved
b9 reserved
b8 reserved
b7–0
NWR SAME data
8.1.17 Powerdown Control – $C0 write
15
ALT
14
13
12
11
OP1 OP2 MOD1 MOD2 AUDIO BIAS Reset Protect XTAL IP2
DIS ENA
10
9
8
7
6
5
4
3
2
1
0
0
0
MIC DISC IP1
Amp Amp Amp ENA ENA ENA ENA ENA ENA
b15 ALT Amp Enable
b14 MIC Amp Enable
b13 DISC Amp Enable
b12 Input 1 Enable
b11 Output 1 Enable
b10 Output 2 Enable
b9 MOD1 Enable
b8 MOD2 Enable
b7 AUDIO Enable
b6 BIAS Block Enable
b5 Reset
0 = off
0 = off
0 = off
0 = off
0 = off
0 = off
0 = off
0 = off
0 = off
0 = off
0 = normal
0 = normal
1 = enabled
1 = enabled
1 = enabled
1 = enabled
1 = enabled
1 = enabled
1 = enabled
1 = enabled
1 = enabled
1 = enabled
1 = reset/powersave
1 = protected
b4 Program Block Protect
If cleared, the Program Blocks will be initialised on Power on or Reset. If set, then the Program
Blocks will retain their previous contents.
b3 XTAL Disable
0 = enabled
1 = disabled / powersave
Setting this bit effectively stops all signal processing within the device.
b2 Input 2 Enable
b1 reserved
b0 reserved
0 = off
0
0
1 = enabled
1 = DO NOT USE
1 = DO NOT USE
Note: Care should be taken when writing to b5 and b3. These are automatically programmed to an
operational state following a power-on (ie: all 0s). Writing a 1 to either b5 or b3 will effectively cause the
© 2010 CML Microsystems Plc
42
D/885/3
CMLMICRO [ CML MICROCIRCUITS ]
