Marine VHF Audio and Signalling Processor
CMX885
8.1.9 Analogue Output Gain – $B0 write
15
14
13
12
11
10
9
8
7
6
0
5
0
4
0
3
2
1
0
MOD1
Attenuation
MOD2
Attenuation
Ramp
Up/Dn
Audio Output
Attenuation
Inv_1
Inv_2
b15
b11
Output1 polarity
Output2 polarity
0 = true
0 = true
1 = inverted
1 = inverted
Used when interfacing with RF. Any change will take place immediately (within the C-BUS
latency period) after these bits are changed.
b14
b13
b12
MOD1 Output Attenuation
b10
0
0
0
0
b9
0
0
1
1
b8
0
1
0
1
MOD2 Output Attenuation
>40dB (default)
12dB
10dB
8dB
1
0
0
6dB
1
0
1
4dB
1
1
0
2dB
1
1
1
0dB
b7
Ramp Up/Down enable
0 = off
1 = on
When bit 7 is set to 1 the MOD output signals are ramped to reduce transients in the
transmitted signal. The ramp up/down time is set in the ‘Ramp Rate Control’ section of the
Programming register (P4.6).
Bits 6 to 4 are reserved - set to 0.
b3
b2
b1
b0
Audio Output Attenuation
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
>60dB (default)
44.8dB
41.6dB
38.4dB
35.2dB
32.0dB
28.8dB
25.6dB
22.4dB
19.2dB
16.0dB
12.8dB
9.6dB
6.4dB
3.2dB
0dB
Note that fine level control of Output 1 and Output 2 can be achieved with the FINE OUTPUT GAIN 1 and
FINE OUTPUT GAIN 2 registers (P4.2-3). These affect the MOD1, MOD2 and AUDIO outputs according
to the routing set in registers $A7 and $B1.
© 2010 CML Microsystems Plc
40
D/885/3
CMLMICRO [ CML MICROCIRCUITS ]
