TDMA Digital Radio Processor
CMX7161
3
Signal List
64-pin
Pin
Description
Q1/L9
Pin No.
1
Name
GPIOB
Type
BI
General Purpose I/O (Used as Tx Enable on DE9943)
The combined state of BOOTEN1 and BOOTEN2, upon
RESET, determine the Function Image™ load interface
2
BOOTEN1
IP+PU
The combined state of BOOTEN1 and BOOTEN2, upon
RESET, determine the Function Image™ load interface
3
4
BOOTEN2
DVSS
IP+PU
PWR
Negative supply rail (ground) for the digital on-chip circuits
3.3V positive supply rail for the digital on-chip circuits. This
pin should be decoupled to DVSS by capacitors mounted
close to the supply pins.
5
DVDD
PWR
6
7
SSOUT2
RESETN
GPIOC
GPIOD
DVSS
OP
IP
SPI: Slave Select Out 2
Logic input used to reset the device (active low)
General Purpose I/O
8
BI
9
BI
General Purpose I/O
10
11
PWR
NC
Negative supply rail (ground) for the digital on-chip circuits
Do not connect
NC
Positive 3.3V supply rail for the analogue on-chip circuit.
Levels and thresholds within the device are proportional to
this voltage. This pin should be decoupled to AVSS by
capacitors mounted close to the device pins.
12
AVDD
PWR
13
14
15
16
17
18
19
20
NC
NC
NC
NC
NC
OP
OP
OP
OP
Do not connect
Do not connect
Do not connect
Do not connect
NC
NC
NC
MOD1P
MOD1N
MOD2P
MOD2N
Differential outputs for Mod 1 signals; ‘P’ is positive, ‘N’ is
negative. Together these are referred to as Mod 1 Output.
Differential outputs for Mod 2 signals; ‘P’ is positive, ‘N’ is
negative. Together these are referred to as Mod 2 Output.
Negative supply rail (ground) for the analogue on-chip
circuits
21
AVSS
PWR
22
23
24
25
26
DACREF
NC
~
DAC reference voltage, connect to AVSS
Do not connect
NC
NC
NC
NC
NC
Do not connect
NC
Do not connect
NC
Do not connect
2013 CML Microsystems Plc
Page 8
D/7161_FI-1.0/4
CMLMICRO [ CML MICROCIRCUITS ]
