Digital PMR Radio Processor
CMX7131/CMX7141
AC Parameters
Notes
Min.
Typ.
Max.
Unit
XTAL/CLK Input
'High' Pulse Width
'Low' Pulse Width
31
31
15
15
–
–
–
–
ns
ns
Input Impedance (at 6.144MHz)
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Resistance
Capacitance
Resistance
Capacitance
–
–
–
–
–
150
20
300
20
20
–
–
–
–
–
k
pF
k
pF
ms
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Xtal Start up (from powersave)
SYSCLK1/2 Outputs
XTAL/CLK Input to SysClk1/2 Timing:
(in high to out high)
32
32
33
33
–
–
76
76
15
15
81.38
81.38
–
–
87
87
ns
ns
ns
ns
(in low to out low)
'High' pulse width
'Low' pulse width
V
BIAS
Start Up Time (from powersave)
–
30
–
ms
Microphone, Alternative and Discriminator
Inputs (MIC, ALT, DISC)
Input Impedance
34
35
–
–
80
>10
–
–
–
80%
–
M
DD
k
Maximum Input Level (pk-pk)
Load Resistance (feedback pins)
Amplifier Open Loop Voltage
Gain
AV
(I/P = 1mVrms at 100Hz)
–
–
80
1.0
–
–
dB
MHz
Unity Gain Bandwidth
36
37
Programmable Input Gain Stage
Gain (at 0dB)
Cumulative Gain Error
(wrt attenuation at 0dB)
0
0
+0.5
+1.0
dB
dB
0.5
1.0
37
31
32
33
34
35
Timing for an external input to the XTAL/CLK pin.
XTAL/CLK input driven by an external source.
6.144MHz Xtal fitted and 6.144MHz output selected (scale for 19.2MHz).
With no external components connected, measured at dc.
Notes:
Centered about AV /2; after multiplying by the gain of input circuit (with external
DD
components connected).
36
37
Gain applied to signal at output of buffer amplifier: DISCFB, ALTFB or MICFB
Design value. Overall attenuation input to output has a tolerance of 0dB ±1.0dB
2014 CML Microsystems Plc
Page 66
D/7141_FI-3.x/6
CMLMICRO [ CML MICROCIRCUITS ]
