Digital PMR Radio Processor
CMX7131/CMX7141
17. Load TxData registers with FACCH2 data (72 bits)
18. Wait for DataReady IRQ.
19. Load TxData registers with FACCH2 data (40 bits)
20. Wait for DataReady IRQ
After the last data bit has left the modulator a “TxDone” IRQ will be asserted. At this point it is now safe for
the host to change the Modem Control and Modem Mode to IDLE ($C1, Modem Control = $0000) and turn
the RF transmitter off.
A typical host Tx sequence for Data Burst is:
1. Load TxData registers with LICH (7 bits) for “10 11 11 0”
2. Set Modem Control = TxFormat, Modem Mode = Tx
3. (Device will start transmission of Preamble and SW followed by contents of TxData registers)
4. Wait for DataReady IRQ
5. Load TxData registers with first part of UDCH2 (72 bits) – this includes the SU field
6. Wait for DataReady IRQ
7. Load TxData registers with second part of UDCH2 (72 bits)
8. Wait for DataReady IRQ
9. Load TxData registers with third part of UDCH1 (72 bits)
10. Wait for DataReady IRQ
11. Load TxData registers with fourth part of UDCH2 data (36 bits + 4 bits padding)
12. Wait for DataReady IRQ
After the last data bit has left the modulator a “TxDone” IRQ will be asserted. At this point it is now safe for
the host to change the Modem Control and Modem Mode to IDLE ($C1, Modem Control = $0000) and turn
the RF transmitter off.
2014 CML Microsystems Plc
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