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CMX7131Q1 参数 Datasheet PDF下载

CMX7131Q1图片预览
型号: CMX7131Q1
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, 4MHz, CMOS, VQFN-64]
分类和应用: 时钟外围集成电路
文件页数/大小: 74 页 / 4034 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Digital PMR Radio Processor  
CMX7131/CMX7141  
In common with other FIs developed for the CMX7131/CMX7141, this device is equipped with two signal  
processing paths. However, in this implementation of the FI, Input 2 is ONLY used in SPI-Codec mode for  
the Tx audio input signal. Input 1 should be routed to one other of the three input sources (ALT, DISC or  
MIC) which should be connected to the radio’s discriminator output. The internal signals Output 1 and 2  
are used to provide either 2-point or I/Q signals and should be routed to the MOD1 and MOD2 pins as  
required. In I/Q mode Input 1 should be routed to the DISC input source for the I channel input and Input 2  
should be routed to the ALT input source for the Q channel input.  
It is important to correctly attach the signal from the CMX994 I/Q outputs to the CMX7141 DISC and ALT  
inputs. Crossing these connections will cause the CMX7141 dc offset calibration to fail, as attempted  
corrections to the I signal will be made to the Q signal and vice versa. Crossed connections can be  
swapped using the Input Gain and Signal Routing register ($B1:b5-2). Likewise, it is important that the  
sense of connection is correct between the CMX994 and CMX7141. If the input signals are inverted then  
attempts by the CMX7141 to remove the dc offset will, in fact, increase the dc offset. The inputs may be  
inverted by using the ‘Input Invert’ bit in the Analogue Output Gain register ($B0:b7). When demodulating  
the received signal (internally to the CMX7141), it is possible that the signal could be inverted, resulting in  
no framesync detection and, in effect, inverted data. Often this can be corrected by swapping the I and Q  
signals (changing the signal that leads in phase to the one that lags). However, the relationship between  
I/Q outputs of the CMX994 and the CMX7141 DISC and ALT inputs must be maintained as described  
above. Therefore the demodulated signal can be inverted using Programming Register block 0, P0.10 bit1  
(IFD).  
6.5.4 Modem Control  
The CMX7131/CMX7141 operates in one of these operational modes:  
o
o
o
o
o
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Idle  
Rx  
Tx  
CMX994 Pass-through  
Rx with CMX994 I/Q Cal.  
Rx with Powersave.  
At power-on or following a Reset, the device will automatically enter Idle mode, which allows for maximum  
powersaving whilst still retaining the capability of monitoring the AuxADC inputs (if enabled).  
It is only possible to write to the Programming register whilst in Idle mode.  
See:  
o
Modem Control - $C1 write  
The RXENA and TXENA pins (GPIO1 and GPIO2) reflect bits 0 and 1 of the Modem Control register, as  
shown in Table 12. These can be used to drive external hardware without the host having to intervene.  
There are also two additional GPIO pins that are programmable under host control.  
2014 CML Microsystems Plc  
Page 38  
D/7141_FI-3.x/6  
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