Digital PMR Radio Processor
CMX7131/CMX7141
6.5.16 Rx Mode with CMX994 AGC (I/Q Mode only)
By default, when receiving in I/Q Mode the CMX7131/CMX7141 will control its internal analogue gain and
the gain of the CMX994 in order to keep the received I/Q signals within an acceptable dynamic range. This
AGC feature may be disabled using Program Block P2.0 (I/Q AGC function), in which case any setup that
the host has made of the CMX994 will determine its gain, with the input gain of the CMX7131/CMX7141
being controlled using the Input Gain and Signal Routing - $B1 write register.
It is important to ensure that the dc offset on the I/Q signals is small, otherwise the AGC function will
interpret the dc as a large received signal and never select maximum gain. This problem can be
addressed by calibrating the CMX994 as described in section 6.5.17.
6.5.17 Rx Mode with CMX994 I/Q Cal (l/Q Mode only)
When receiving, the CMX7131/CMX7141 will estimate and remove the dc error present in the I/Q signals
from a CMX994 receiver. However, it is necessary to calibrate the CMX994 so that the magnitude of the
dc offsets present is as small as possible. Selecting Rx mode with CMX994 I/Q Cal ($C1, Modem Control
b3-0 = $5) causes the CMX7131/CMX7141 to measure the dc offset on the DISC and ALT input pins and
to control the CMX994 receiver to minimise the dc offsets. The CMX7131/CMX7141 will then begin to
receive normally – correcting the remaining dc offset internally.
Important note: when calibrating I/Q it is important that the I/Q signals are not swapped when interfacing to
the CMX994. This can be corrected by using bits 2 to 5 of the Input Gain and Routing register ($B1).
If the CMX994 is poorly calibrated, a loss of headroom when receiving signals will result. In extreme
cases, when large dc offsets are amplified, the result can be big enough to prevent the AGC from reaching
maximum gain as it interprets the dc offset itself as a large signal.
Having calibrated the CMX994, the value written to the CMX994 dc offset correction register is available to
read using the Aux Data and Status ($A9, $AA) registers. This means that having calibrated the CMX994
on a receive channel the calibration result may be stored by the host microcontroller and restored at a later
time.
6.5.18 Rx Mode with Powersave (I/Q Mode only)
Selecting powersave mode ($C1, Modem Control b3-0 = $9) will cause the CMX7131/CMX7141 to control
the CMX994, switching it into a low-power state for a short period of time. Once the powersave timer has
expired then the CMX994 and the internal circuits of the CMX7131/CMX7141 will be powered-up, ready to
receive.
On entering the powered-up state, the CMX7131/CMX7141 will monitor the received I/Q signals for energy
in its sampled bandwidth and if there is no signal present it will return to the powersave state, powering
down the CMX994. If sampled energy is found then the signal is passed through a channel filter and the
resulting signal measured. If no signal is found the powersave state is selected once more. Finally, a
squelch measurement is taken, by FM demodulating the received signal and measuring the energy above
the expected signal bandwidth. If squelch indicates that the signal is a good FM modulated signal
powersave mode is ended, leaving the CMX994 and CMX7131/CMX7141 on and in receive, until the
mode register is written to.
Throughout the time that the receiver is on, the CMX7131/CMX7141 will search for a frame sync and start
receiving the data following that frame sync, if found. However, dependent on the powersave period, it is
possible that the frame sync at the start of a burst may be missed, in which case ‘late entry’ is possible.
Thresholds for comparison and timings for powersave mode may be adjusted, potentially improving
powersaving by being powered down for a greater period of time, but at the expense of a slower reaction
to a received signal. See the Aux Config - $CD write register.
2014 CML Microsystems Plc
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