AX.25 Modem
CMX7031/CMX7041
DC Parameters (continued)
Notes
Min.
Typ.
Max.
Unit
25
XTAL/CLOCK
Input Logic ‘1’
Input Logic ‘0’
70%
–
–
–
–
–
–
–
30%
40
DV
DV
µA
µA
DD
DD
Input Current (Vin = DV
Input Current (Vin = DV
)
)
DD
–
40
SS
C-BUS Interface and Logic Inputs
Input Logic ‘1’
70%
–
1.0
–
–
–
–
–
–
DV
DD
Input Logic ‘0’
Input Leakage Current (Logic ‘1’ or ‘0’)
Input Capacitance
30%
1.0
7.5
DV
DD
21
µA
pF
C-BUS Interface and Logic Outputs
Output Logic ‘1’
(I = 120µA)
90%
80%
–
–
–
1.0
1.0
–
–
–
–
–
–
–
–
–
10%
15%
10
+1.0
+1.0
DV
OH
DD
DD
DD
DD
(I = 1mA)
DV
DV
DV
µA
µA
OH
Output Logic ‘0’
(I = 360µA)
OL
(I = -1.5mA)
OL
“Off” State Leakage Current
21
26
IRQN
RDATA (output HiZ)
(Vout = DV
)
DD
µA
V
BIAS
–
–
±2%
22
–
–
AV
DD
k
Output Voltage Offset wrt AV /2 (I < 1A)
DD
OL
Output Impedance
25
26
Characteristics when driving the XTAL/CLOCK pin with an external clock source.
Notes:
Applies when utilising V
to provide a reference voltage to other parts of the
BIAS
system. When using V
as a reference, V
must be buffered. V
must
BIAS
BIAS
BIAS
always be decoupled with a capacitor as shown in Figure 2 and Figure 3.
2013 CML Microsystems Plc
Page 40
D/7031/7041_FI-4.x/5
CMLMICRO [ CML MICROCIRCUITS ]
