AX.25 Modem
CMX7031/CMX7041
7.10 Digital System Clock Generators
to RF Synthesiser
Ref CLK selection
SYSCLK1 VCO
24.576-
98.304MHz
LPF
VCO
VCO
VCO
(49.152MHz typ)
Ref CLK div
/1 to 512
PLL div
/1 to 1024
$AB b0-9
PD
SYSCLK1
Ref
SYSCLK1
Div
$AC b0-8
48 - 192kHz
(96kHz typ)
VCO op div
/1 to 64
$AB b10-15
SYSCLK1
Pre-CLK
$AC b11-15
SYSCLK1
Output
384kHz-20MHz
SYSCLK2 VCO
24.576-
98.304MHz
LPF
(49.152MHz typ)
Ref CLK div
/1 to 512
PLL div
/1 to 1024
$AD b0-9
PD
SYSCLK2
Ref
SYSCLK2
Div
$AE b0-8
48 - 192kHz
(96kHz typ)
VCO op div
/1 to 64
$AD b10-15
SYSCLK2
Pre-CLK
$AE b11-15
SYSCLK2
Output
384kHz-20MHz
MainCLK VCO
24.576-
LPF
98.304MHz
(49.152MHz typ)
Ref CLK div
/1 to 512
PLL div
/1 to 1024
PD
MainCLK
Ref
MainCLK
Div
48 - 192kHz
(96kHz typ)
VCO op div
/2
MainCLK
Output
384kHz-50MHz
(49.512MHz typ)
MainCLK
Pre-CLK
To Internal
ADC / DAC
dividers
3.0 - 12.288MHz Xtal
AuxADC
Div
OSC
or
Aux_ADC
(83.3kHz typ)
3.0 - 24.576MHZ Clock
Figure 18 Digital Clock Generation Schemes
The CMX7031/CMX7041 includes a two-pin crystal oscillator circuit. This can either be configured as an
oscillator, as shown in section 5, or the XTAL input can be driven by an externally generated clock. The
crystal (Xtal) source frequency can go up to 12.288MHz (clock source frequency up to 24.576MHz), but a
19.2MHz oscillator is assumed for the functionality provided in the CMX7031/CMX7041.
2013 CML Microsystems Plc
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