CS5463
VOD (IOD)
Modulator oscillation detected on the voltage (current) channel. Set when the modulator oscil-
lates due to an input above full scale. The level at which the modulator oscillates is significantly
higher than the voltage channel’s differential input voltage (current) range.
Note: The IOD and VOD bits may be ‘falsely’ triggered by very brief voltage spikes from the
power line. This event should not be confused with a DC overload situation at the inputs,
when the IOD and VOD bits will re-assert themselves even after being cleared, multiple
times.
LSD
IC
Low Supply Detect. Set when the voltage at the PFMON pin falls below the low-voltage thresh-
old (PMLO), with respect to AGND pin. The LSD bit cannot be reset until the voltage at PFMON
pin rises back above the high-voltage threshold (PMHI).
Invalid Command. Normally logic 1. Set to logic 0 if an invalid command is received or the Sta-
tus Register has not been successfully read.
6.1.12 Current and Voltage AC Offset Register ( VACoff , IACoff
)
Address: 16 (Current AC Offset); 17 (Voltage AC Offset)
MSB
LSB
0
-1
-2
-3
-4
-5
-6
-7
-17
-18
-19
-20
-21
-22
-23
.....
-(2 )
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Default = 0x000000
The AC Offset Registers (VACoff, IACoff)are initialized to zero on reset, allowing for uncalibrated normal operation.
AC Offset Calibration updates these registers. This sequence lasts approximately (6N + 30) ADC cycles (where
N is the value of the Cycle Count Register). DRDY will be asserted at the end of the calibration. These values
may be read and stored for future system AC offset compensation. The value is represented in two's comple-
ment notation in the range of -1.0 ≤ VACoff, IACoff < 1.0, with the binary point to the right of the MSB
6.1.13 Operational Mode Register ( Mode )
Address: 18
23
15
22
14
21
13
20
12
19
11
18
10
17
16
9
8
E2MODE
XVDEL
7
6
5
4
3
2
1
0
XIDEL
IHPF
VHPF
IIR
E3MODE1
E3MODE0
POS
AFC
Default = 0x000000
E2MODE
E2 Output Mode
0 = Sign of Active Power (default)
1 = Apparent Power
XVDEL
XIDEL
IHPF
Enables an extra sample of voltage channel delay. XVDEL and XIDEL can not be enabled at
the same time.
Enables an extra sample of current channel delay. XVDEL and XIDEL can not be enabled at
the same time.
Enables the High-pass Filter on the current channel.
0 = High-pass filter disabled (default)
1 = High-pass filter enabled
30
DS678PP1
CIRRUS [ CIRRUS LOGIC ]
