CS5460A
SWITCHING CHARACTERISTICS
(T = -40 °C to +85 °C; VA+ = 5.0 V 10%; VD+ = 3.0 V 10% or 5.0 V 10%; VA- = 0.0 V; Logic Levels:
A
Logic 0 = 0.0 V, Logic 1 = VD+; CL = 50 pF))
Parameter
Symbol
MCLK
Min
2.5
40
Typ
4.096
-
Max
20
Unit
MHz
%
Master Clock FrequencyCrystal/Internal Gate Oscillator (Note 24)
Master Clock Duty Cycle
60
CPUCLK Duty Cycle
Rise Times
(Note 25)
40
60
%
Any Digital Input Except SCLK (Note 26)
t
-
-
-
-
-
50
1.0
100
-
µs
µs
ns
rise
SCLK
Any Digital Output
Fall Times
Any Digital Input Except SCLK (Note 26)
t
-
-
-
-
-
50
1.0
100
-
µs
µs
ns
fall
SCLK
Any Digital Output
Start-up
Oscillator Start-Up Time
XTAL = 4.096 MHz (Note 27)
t
-
60
-
ms
ost
Serial Port Timing
Serial Clock Frequency
Serial Clock
SCLK
-
-
2
MHz
Pulse Width High
Pulse Width Low
t
t
200
200
-
-
-
-
ns
ns
1
2
SDI Timing
CS Falling to SCLK Rising
t
t
t
t
50
50
-
-
-
-
-
-
-
-
ns
ns
ns
ns
3
4
5
6
Data Set-up Time Prior to SCLK Rising
Data Hold Time After SCLK Rising
SCLK Falling Prior to CS Disable
100
100
SDO Timing
CS Falling to SDI Driving
t
t
t
-
-
-
20
20
20
50
50
50
ns
ns
ns
7
8
9
SCLK Falling to New Data Bit
CS Rising to SDO Hi-Z
Auto-Boot Timing
Serial Clock
Pulse Width High
Pulse Width Low
t
t
8
8
MCLK
MCLK
10
11
MODE setup time to RESET Rising
RESET rising to CS falling
CS falling to SCLK rising
t
t
t
t
t
t
50
48
ns
MCLK
MCLK
MCLK
ns
12
13
14
15
16
17
100
8
SCLK falling to CS rising
16
CS rising to driving MODE low (to end auto-boot sequence).
SDO guaranteed setup time to SCLK rising
50
100
ns
Notes: 24. Device parameters are specified with a 4.096 MHz clock, yet, clocks between 3 MHz to 20 MHz can be
used. However, for input frequencies over 5 MHz, an external oscillator must be used.
25. If external MCLK is used, then duty cycle must be between 45% and 55% to maintain this specification.
26. Specified using 10% and 90% points on wave-form of interest. Output loaded with 50 pF.
27. Oscillator start-up time varies with crystal parameters. This specification does not apply when using an
external clock source.
9
CIRRUS [ CIRRUS LOGIC ]
