CS5460A
1. CHARACTERISTICS AND SPECIFICATIONS
ANALOG CHARACTERISTICS
(T = -40 °C to +85 °C; VA+ = VD+ = +5 V 10%; VREFIN = +2.5 V; VA- = AGND = 0 V; MCLK = 4.096 MHz,
A
K = 1; N = 4000 ==> OWR = 4000 Sps.)(See Notes 1, 2, 3, 4, and 5.)
Parameter
Accuracy (Both Channels)
Symbol
Min
Typ
Max
Unit
Common Mode Rejection
(DC, 50, 60 Hz) CMRR
80
-
-
-
-
dB
Offset Drift (Without the High Pass Filter)
Analog Inputs (Current Channel)
5
nV/°C
Maximum Differential Input Voltage Range
{(VIIN+) - (VIIN-)}
(Gain = 10)
(Gain = 50)
IIN
-
-
-
-
500
100
mV
mV
P-P
P-P
Total Harmonic Distortion
THDI
80
-0.25
-
-
-
-
-
dB
Common Mode + Signal on IIN+ or IIN-
Crosstalk with Voltage Channel at Full Scale
Input Capacitance
(Gain = 10 or 50)
VA+
-115
V
(50, 60 Hz)
dB
(Gain = 10)
(Gain = 50)
Cin
-
-
25
25
-
-
pF
pF
Effective Input Impedance
Noise (Referred to Input)
(Note 6)
(Gain = 10)
(Gain = 50)
ZinI
ZinI
-
-
30
30
-
-
kΩ
kΩ
(Gain = 10)
(Gain = 50)
-
-
-
-
20
4
µV
rms
rms
µV
Accuracy (Current Channel)
Bipolar Offset Error
(Note 1)
(Note 1)
VOSI
FSEI
-
-
0.001
0.001
-
-
%F.S.
%F.S.
Full-Scale Error
Analog Inputs (Voltage Channel)
Maximum Differential Input Voltage Range {(VVIN+) - (VVIN-)}
VIN
-
-
500
mV
P-P
Total Harmonic Distortion
THDV
62
-
-
-
VA+
-70
-
dB
Common Mode + Signal on VIN+ or VIN-
VA-
V
Crosstalk with Current Channel at Full Scale
Input Capacitance
(50, 60 Hz)
(Note 6)
-
-
-
-
-
dB
pF
CinV
0.2
5
Effective Input Impedance
Noise (Referred to Input)
ZinV
-
MΩ
µV
rms
-
250
Accuracy (Voltage Channel)
Bipolar Offset Error
(Note 1)
(Note 1)
VOSV
FSEV
-
-
0.01
0.01
-
-
%F.S.
%F.S.
Full-Scale Error
Notes: 1. Bipolar Offset Errors and Full-Scale Gain Errors for the current and voltage channels refer to the respective Irms
Register and Vrms Register output, when the device is operating in ‘continuous computation cycles’ data acquisition
mode, after offset/gain system calibration sequences have been executed. These specs do not apply to the error
of the Instantaneous Current/Voltage Register output.
2. Specifications guaranteed by design, characterization, and/or test.
3. Analog signals are relative to VA- and digital signals to DGND unless otherwise noted.
4. In requiring VA+ = VD+ =5 V 10%, note that it is allowable for VA+, VD+ to differ by as much as 200 mV, as long
as VA+ > VD+.
5. Note that “Sps” is an abbreviation for units of “samples per second”.
6. Effective Input Impedance (Zin) is determined by clock frequency (DCLK) and Input Capacitance (IC).
Zin = 1/(IC*DCLK/4). Note that DCLK = MCLK / K.
5
CIRRUS [ CIRRUS LOGIC ]
