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CS5101A-JL16 参数 Datasheet PDF下载

CS5101A-JL16图片预览
型号: CS5101A-JL16
PDF下载: 下载PDF文件 查看货源
内容描述: 16位, 100kHz的/ 20kHz的A / D转换器 [16-Bit, 100kHz/ 20kHz A/D Converters]
分类和应用: 转换器
文件页数/大小: 40 页 / 461 K
品牌: CIRRUS [ CIRRUS LOGIC ]
 浏览型号CS5101A-JL16的Datasheet PDF文件第26页浏览型号CS5101A-JL16的Datasheet PDF文件第27页浏览型号CS5101A-JL16的Datasheet PDF文件第28页浏览型号CS5101A-JL16的Datasheet PDF文件第29页浏览型号CS5101A-JL16的Datasheet PDF文件第31页浏览型号CS5101A-JL16的Datasheet PDF文件第32页浏览型号CS5101A-JL16的Datasheet PDF文件第33页浏览型号CS5101A-JL16的Datasheet PDF文件第34页  
CS5101A CS5102A  
Function  
Better DNL  
CS5101A/CS5102A  
No missing codes at +125 °C  
CS5101A CS5102A  
CS5101/CS5102  
Some missed codes at +125 °C  
CS5101 CS5102  
Faster Fine Charge  
Slew Rate  
(V/µs)  
Unipolar/Fine  
Bipolar/Fine  
2
4
0.4  
0.8  
Unipolar/Fine  
Bipolar/Fine  
1.3  
2.6  
0.1  
0.2  
Improved Serial  
Interface  
Has serial data latch  
signal (SSH/SDL).  
Does not have serial data  
latch (SDL) signal.  
CLKIN Rate  
CS5101A maximum  
CLKIN is 9.216 MHz  
CS5102A maximum  
CLKIN is 2.0 MHz  
CS5101 maximum  
CLKIN is 8.0 MHz  
CS5102 maximum  
CLKIN is 1.6 MHz  
Code and  
BP/UP Pin  
Function  
Independent setting of 2’s  
complement or offset binary  
coding (CODE) and bipolar or  
unipolar input range (BP/UP)  
Selecting unipolar input range  
forces offset binary operation,  
independent of the CODE pin state  
CRS/FIN Pin  
Can be high or low  
during calibration  
CRS/FIN must be held  
low during calibration  
Table 3. CS5101A/CS5102A Improvements over CS5101/CS5102  
Schematic & Layout Review Service  
Confirm Optimum  
Schematic & Layout  
Before Building Your Board.  
For Our Free Review Service  
Call Applications Engineering.  
C a l l : ( 5 1 2 ) 4 4 5 - 7 2 2 2  
30  
DS45F2  
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