CS5012A, CS5014, CS5016
PIN STATUS BIT
STATUS
DEFINITION
D0
S0
END OF CONVERSION
Falls upon completion of a conversion,
and returns high on the first subsequent read.
D1
D2
S1
S2
RESERVED
Reserved for factory use.
LOW BYTE/HIGH BYTE
When data is to be read in an 8-bit format (BW=0),
indicates which byte will appear at the output next.
D3
S3
END OF TRACK
When low, indicates the input has been acquired to
the devices specified accuracy.
D4
D5
D6
D7
S4
S5
S6
S7
RESERVED
TRACKING
Reserved for factory use.
High when the device is tracking the input.
High when the device is converting the held input.
High when the device is calibrating.
CONVERTING
CALIBRATING
Table 2. Status Pin Definitions
To interface with a 16-bit data bus, the BW input
to the CS5012A/14/16 should be held high and
all data bits (12, 14 and 16 for the CS5012A,
CS5014 and CS5016 respectively) read in paral-
lel on pins D4-D15 (CS5012A), D2-D15
(CS5014), or D0-D15 (CS5016). With an 8-bit
bus, the converter’s result must be read in two
portions. In this instance, BW should be held low
and the 8 MSB’s obtained on the first read cycle
following a conversion. The second read cycle
will yield the remaining LSB’s (4, 6 or 8 for the
CS5012A/14/16 respectively) with 4, 2 or 0 trail-
ing zeros. Both bytes appear on pins D0-D7. The
upper/lower bytes of the same data will continue
to toggle on subsequent reads until the next con-
version finishes. Status bit S2 indicates which
byte will appear on the next data read operation.
The CS5012A/14/16 internally buffer their output
data, so data can be read while the devices are
tracking or converting the next sample. Therefore,
retrieving the converters’ digital output requires
no reduction in ADC throughput. Enabling the 3-
state outputs while the CS5012A/14/16 is
converting will not introduce conversion errors.
Connecting CMOS logic to the digital outputs is
recommended. Suitable logic families include
4000B, 74HC, 74AC, 74ACT, and 74HCT.
D15 D14 D13 D12 D11 D10 D9 D8
Status
(A0=0)
D7
D6 D5 D4 D3 D2 D1 D0
S1 S0
8- or 16-Bit
Data Bus
X
X
X
X
X
X
X
X
S7 S6 S5 S4 S3 S2
CS5012A
CS5014
CS5016
B11 B10
B5 B4
B7 B6
B9 B8
B3 B2 B1 B0
B5 B4 B3 B2
B7 B6 B5 B4
0
0
0
0
0
0
B9 B8
B7
B6
B8
16-Bit Bus
(BW=1)
B13 B12 B11 B10 B9
B1 B0
B3 B2
B15
B14 B13 B12 B11 B10
B1 B0
Data
(A0=1)
CS5012A
CS5014
CS5016
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
B11 B10 B9 B8
B7 B6
B5
B4
0
B3
B2
B1 B0
0
0
0
X
X
B13 B12 B11 B10 B9 B8
B7
0
B6
0
8-Bit Bus
(BW=0)
B5 B4 B3 B2 B1 B0
B15 B14 B13 B12 B11 B10 B9
B7 B6 B5 B4 B3 B2 B1
B8
B0
"X" Denotes High Impedance Output
Figure 7. CS5012A/14/16 Data Format
DS14F6
2-23
CIRRUS [ CIRRUS LOGIC ]
