CS49300 Family DSP
CS—Host Parallel Chip Select, Host Serial SPI Chip Select: Pin 18
In parallel host mode, this pin serves as the active-low chip-select input signal. In serial host
SPI mode, this pin is used as the active-low chip-select input signal. INPUT
RESET—Master Reset Input: Pin 36
Asynchronous active-low master reset input. Reset should be low at power-up to initialize the
CS493XX and to guarantee that the device is not active during initial power-on stabilization
periods. At the rising edge of reset the host interface mode is selected contingent on the state of
the RD, WR and PSEL pins. Additionally, an autoboot sequence can be initiated if a serial
control mode is selected and ABOOT is held low. If reset is low all bidirectional pins are high
impedance inputs. INPUT
SCDIO, SCDOUT, PSEL, GPIO9—Serial Control Port Data Input and Output, Parallel Port
Type Select: Pin 19
2
In I C mode, this pin serves as the open-drain bidirectional data pin. In SPI mode this pin
serves as the data output pin. In parallel host mode, this pin is sampled at the rising edge of
RESET to configure the parallel host mode as an Intel type bus or as a Motorola type bus. In
parallel host mode, after the bus mode has been selected, the pin can function as a general-
purpose input or output pin. BIDIRECTIONAL - Default: INPUT
2
In I C mode this pin is an OPEN DRAIN I/O and requires a 4.7k Pull-Up
EXTMEM, GPIO8—External Memory Chip Select or General Purpose Input & Output Number
8: Pin 21
In serial control port mode, this pin can serve as an output to provide the chip-select for an
external byte-wide ROM. In parallel and serial host mode, this pin can also function as a
general-purpose input or output pin. BIDIRECTIONAL - Default: INPUT
INTREQ, ABOOT—Control Port Interrupt Request, Automatic Boot Enable: Pin 20
Open-drain interrupt-request output. This pin is driven low to indicate that the DSP has
outgoing control data and should be serviced by the host. Also in serial host mode, this signal
initiates an automatic boot cycle from external memory if it is held low through the rising edge
of reset. OPEN DRAIN I/O - Requires 4.7k Ohm Pull-Up
AUDATA2—Digital Audio Output 2: Pin 39
PCM multi-format digital-audio data output, capable of two-channel 20-bit output. This PCM
output defaults to DGND as output until enabled by the DSP software. OUTPUT
AUDATA1—Digital Audio Output 1: Pin 40
PCM multi-format digital-audio data output, capable of two-channel 20-bit output. This PCM
output defaults to DGND as output until enabled by the DSP software. OUTPUT
AUDATA0—Digital Audio Output 0: Pin 41
PCM multi-format digital-audio data output, capable of two-, four-, or six-channel 20-bit
output. This PCM output defaults to DGND as output until enabled by the DSP software.
OUTPUT
82
DS339PP4
CIRRUS [ CIRRUS LOGIC ]
